Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2001-07-11
2002-07-02
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C438S014000, C257S765000, C257S771000
Reexamination Certificate
active
06414336
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device which is suitable for manufacturing a large number of kinds of products.
2. Description of the Related Art
In a prior art method for manufacturing a semiconductor device such as a MOS device (see JP-A-3-196655 & JP-A-3-268441), probe pads are formed simultaneously with formation of a lower aluminum wiring layer to complete a monitoring MOS element. Then, a test operation is performed by placing probes onto the probe pads upon the monitoring MOS element. This will be explained later in detail.
In the above-described prior art method, however, even when the test operation indicates that the monitoring MOS element has failed to save the post-stage processes of the device, the manufacturing yield is low.
In order to improve the manufacturing yield, it has been suggested that the probe pads be formed simultaneously with the formation of the gate electrode layer (see JP-A-1-194433, JP-A-1-201964 & JP-A-4-215451). Even in this case, after the test operation indicates that the monitoring MOS element has failed, the post-stage processes of the device are saved, which may increase the manufacturing yield. However, if such devices are scrapped, the manufacturing yield is still low.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of increasing the manufacturing yield.
According to the present invention, in a method for manufacturing a semiconductor device, probe pads are formed simultaneously with formation of an intermediate conductive layer, and a test operation is performed upon the semiconductor device by placing probes on the probe pads. Then, post-stage processes are performed upon the semiconductor device in accordance with characteristics of the semiconductor device obtained by the test operation.
Since the post-stage processes such as aluminum wiring processes are changed in accordance with the characteristics of the tested semiconductor device, a large number of kinds of products can be manufactured, which increases the manufacturing yield.
REFERENCES:
patent: 4952272 (1990-08-01), Okino et al.
patent: 5924029 (1999-07-01), Ference
patent: 5976418 (1999-11-01), Fuller
patent: 6110823 (2000-08-01), Eldridge
patent: 6143668 (2000-11-01), Dass
patent: 1-194433 (1989-08-01), None
patent: 1-201964 (1989-08-01), None
patent: 2-82553 (1990-03-01), None
patent: 3-196655 (1991-08-01), None
patent: 3-268441 (1991-11-01), None
patent: 4-215451 (1992-08-01), None
patent: 04-333255 (1992-11-01), None
patent: 06-120456 (1994-04-01), None
patent: 10-107153 (1998-04-01), None
Le Thao P
NEC Corporation
Whitham Curtis & Christofferson, PC
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