Semiconductor device and test method thereof

Details Semiconductor device and test method thereof Semiconductor device and test method thereof

2006-10-03

2006-10-03

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S189011, C365S189060, C365S189120

Reexamination Certificate

active

07116592

ABSTRACT:
Data read out from each memory cell in a memory cell array is compared with an expected value by a comparator, and the quality of a memory cell is determined by performing program verify and erase verify. Based on the comparison result of the comparator, a detected defective cell is repaired by replacing it with a spare cell. Every time a defective cell is replaced with a spare cell, information on the defective cell is stored in a register, and whether a defective cell exists and whether the repair is possible are determined on the basis of the information. When the repair is possible, a control circuit is caused to execute control, and a detected defective cell is repaired by replacing it with a spare cell. When the repair is impossible, the defect repair stops.

REFERENCES:
patent: 6496417 (2002-12-01), Shiau et al.
patent: 2001/0024390 (2001-09-01), Fukuda
patent: 2004/0240249 (2004-12-01), Kuzuno et al.
patent: 2000-57795 (2000-02-01), None
patent: 2000-322898 (2000-11-01), None
patent: 2001-266589 (2001-09-01), None
patent: WO2002-037504 (2002-05-01), None

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