Semiconductor device, and semiconductor manufacturing method

Details Semiconductor device, and semiconductor manufacturing method Semiconductor device, and semiconductor manufacturing method

2011-08-16

2011-08-16

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S357000, C257S369000, C257SE27046, C257SE27067, C438S228000

Reexamination Certificate

active

07999327

ABSTRACT:
In a semiconductor substrate having a first well of a conductivity type opposite to that of the semiconductor substrate, formed on part of a main surface of the semiconductor substrate, a second well of the same conductivity type as the semiconductor substrate, formed on part of a surface region of the first well shallower than the first well, and a third well of a conductivity type opposite to that of the semiconductor substrate, formed in a surface region of the first well, in a region where the second well is not formed and shallower than the first well, by having a fourth well, formed in a region of the main surface of the semiconductor substrate where the first well is not formed and doped with impurities of the same conductivity type as the semiconductor substrate at a lower concentration than the third well, and controlling a reference voltage to be low, it is possible suppress the occurrence of a latch up phenomenon.

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Notice of Grounds for Rejection for Patent Application No. JP2004-350218 with English translation mailed Feb. 2, 2010.

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