Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-05-08
2007-05-08
Owens, Douglas W. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S371000
Reexamination Certificate
active
10975956
ABSTRACT:
Soft-error resistance and latch up resistance are simultaneously improved for LSI involving miniaturization and reducing operating voltage. P wells and N wells are formed in a higher density substrate (P on P+ substrate), and buried N wells are formed on a layer underlying thereof. A PMOSFET is formed in the N well and a NMOSFET is formed in the P well. A P well electric potential junction for coupling P well electric potential of the P well to predetermined electric potential is provided, and a region directly under the P well electric potential junction is provided with a region where the aforementioned buried N well is not disposed. The soft-error resistance is improved by having the buried N well therein, and the latch up resistance is improved by coupling the P well to the substrate.
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Furuta Hiroshi
Ushiroda Masaru
McGinn IP Law Group PLLC
NEC Electronics Corporation
Owens Douglas W.
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