Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – With inversion-preventing shield electrode
Reexamination Certificate
2001-03-07
2003-02-04
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
With inversion-preventing shield electrode
Reexamination Certificate
active
06515349
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates, in general, to a semiconductor device and, in particular, to a double diffused MOS (DMOS) transistor which is built in a discrete element or an IC. This invention also relates to a process for such a semiconductor device.
2. Description of the Background Art
FIG. 8
is a cross section view of a conventional DMOS transistor.
Referring to
FIG. 8
, an n
−
epitaxial layer
2
is formed on an n
+
substrate
1
. P diffusion regions
3
are provided in the surface of the n
−
epitaxial layer
2
. N
+
diffusion regions
4
are formed inside of the p diffusion regions
3
and in the outer periphery part of the element. A gate oxide film
5
is formed on the n
−
epitaxial layer
2
and a polysilicon gate electrode
6
is formed on the gate oxide film
5
. A field oxide film
7
is formed on the surface of the n
−
epitaxial layer
2
. A gate electrode is also formed on the field oxide film
7
and this operates as a field plate. In the following this is referred to as a field plate
6
f.
A source electrode
8
is formed so as to contact the p diffusion regions
3
and n
+
diffusion regions
4
. A channel stopper electrode
9
is formed so as to contact the outer periphery part n
+
diffusion region
4
. A drain electrode
10
is formed so as to contact the back surface of the n
+
substrate
1
. The reference numeral
11
denotes the edge of the depletion layer in the case that where a bias is applied.
The field plate
6
f
mitigates the electric field concentration on the edge part of the p diffusion regions
3
. By terminating the polysilicon edge part with the upper part of the field oxide film
7
, the electric field concentration of the gate edge part is formed inside of the field oxide film
7
so as to increase the withstanding voltage.
In the structure of the above described conventional DMOS transistor, however, referring to
FIG. 9
, a problem arises that an electric field concentration exists at the edge part of the field oxide film
7
and by an avalanche in this part the entire withstanding voltage is limited. This operation is described in further detail using FIG.
10
.
An electric flux at the time of bias application generates a bending as shown in equation (1) at the interface due to the relationship of dielectric constants of SiO
2
and Si and, then, terminates, perpendicularly, at the field plate
6
f.
tan &thgr;
1
/&egr;
1
=tan &thgr;
2
/&egr;
2
(1)
wherein specific dielectric constant of Si is denoted as &egr;
1
while specific dielectric constant of SiO
2
is denoted as &egr;
2
, and, here, &egr;
1
is approximately 3 times as large as &egr;
2
and &thgr;
1
becomes larger, accordingly.
Because of these relationships the electric flux on the Si bends in the left direction and a electric field concentration occurs at the edge part of the field oxide film
7
.
SUMMARY OF THE INVENTION
Therefore, the purpose of this invention is to provide a semiconductor device which has a field plate structure where such an electric field concentration does not occur.
Another purpose of this invention is to provide a process for such a semiconductor device.
A semiconductor device according to the first aspect of this invention includes a substrate. A field plate is provided on the above substrate. The above field plate has a step part which bends from the surface of the above substrate toward the downward direction.
According to this invention, since the above field plate has the step part which bends from the surface of the above substrate toward the downward direction, the electric field concentration at the step part is eliminated.
In accordance with a semiconductor device according to the second aspect of this invention, an indented part, of which the side walls are sloped, is provided on the surface of the above substrate. An oxide flim, of which part of the edge is a downward slope, is provided on the above indented part. The above step part of the above field plate is provided so as to cover the above slope of the above oxide film. The above field plate bends toward the downward direction at the above step part with a bending angle &phgr; which satisfies the following inequality.
tan &phgr;≧
x
(1−&agr;)/(1+&agr;
x
2
)
In the above equation x=tan &thgr;
1
, &agr;=specific dielectric constant of the above described oxide film/specific dielectric constant of the above described substrate, and &thgr;
1
is an angle formed of the above described slope of the above described indented part and the above described substrate surface.
In a semiconductor device according to the third aspect of this invention, the above described substrate is an Si substrate while the above described oxide film is SiO
2
.
A semiconductor device according to the fourth aspect of this invention includes a substrate of which part of the surface is indented. An oxide film is provided in the above indented part of the surface of the above substrate. A first field plate is provided on the above substrate. A second field plate, which has a part extending in the horizontal direction, is provided on the above oxide film. When the distance, in the horizontal direction, between the above first field plate and the above part extending in the horizontal direction of the above second field plate is assumed to be 1, the depth of the bottom of the above oxide film from the surface of the above substrate is assumed to be x and the depth of the bottom of the above second field plate from the surface of the above substrate is assumed to be y, the following inequality is achieved.
y≧x
(1−&agr;)/(1+&agr;
x
2
)
In the above expression, &agr;=specific dielectric constant of the above oxide film/specific dielectric constant of the above substrate.
In a semiconductor device according to the fifth aspect of this invention, the above substrate is formed of Si while the above oxide film is formed of SiO
2
.
In accordance with a semiconductor device according to the sixth aspect of this invention, another part of the above second field plate is overlapped on the above first field plate by interposing an interlayer insulating film.
In a semiconductor device according to the seventh aspect of this invention, the above first field plate and the above second field plate are integrated.
In a process for a semiconductor device according to the eighth aspect of this invention, a field oxide film is formed on the surface of the substrate through a LOCOS method (first step). Part of the edge part of the above field oxide film is shaved off so that part of the surface of the above substrate is exposed (second step). A part of the surface of the above substrate which is exposed in the above second step is oxidized again (third step). A field plate is formed on the above substrate so as to cover the part oxidized again of the above field oxide film (fourth step).
In a process for a semiconductor device according to the ninth aspect of this invention, the above process is applied in a process for a double diffused MOS transistor.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4954868 (1990-09-01), Bergmann et al.
patent: 5648671 (1997-07-01), Merchant
patent: 6054752 (2000-04-01), Hara et al.
patent: 6064086 (2000-05-01), Nakagawa et al.
patent: 6221737 (2001-04-01), Letavic et al.
Meier Stephen D.
Mitsubishi Denki & Kabushiki Kaisha
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