Semiconductor device and process for producing the same

Details Semiconductor device and process for producing the same Semiconductor device and process for producing the same

2002-01-18

2004-01-20

Whitehead, Jr., Carl (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C438S623000

Reexamination Certificate

active

06680541

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device and a process for producing the same. More particularly, the present invention relates to a semiconductor device suitable for high speed operation with low consuming electric power and a process for producing the same.
With miniaturization of semiconductor devices, parasitic capacitance of multilevel wiring becomes the same level as parasitic capacitance of transistor per se, and operational speed of LSI devices strongly depends on the wiring capacitance. Thus, introduction of insulating films having a relative dielectric constant (k) lower than that of a conventional silicon oxide film (k~4) (hereinafter referred to as “a low dielectric constant film”) has been studied extensively.
FIGS. 1
to
4
are cross-sectional views explaining how to use a conventional low dielectric constant film. These drawings show a step of forming inlaid wires by a damascene process as an example. First, a silicon oxide film
9
as a protective film is formed on a low dielectric constant film
8
in about 100 nm thick or more to form a layered film, on which a trench pattern
16
is formed (FIG.
1
). After removing the resist
6
(FIG.
2
), a thin film of titanium nitride, tantalum nitride, or the like is formed as a barrier metal, followed by formation of copper
18
(FIG.
3
). Then, the copper and the barrier metal are removed by chemical-mechanical polishing (CMP) method, while retaining the copper and the barrier metal only in the trench pattern to form electroconductive portions such as wires and vias (FIG.
4
).
As the material for the low dielectric constant film
8
, the following three materials, that is, fluorinated siloxane type insulating films (k~3.5), organic polymer type insulating films (k~3), and organic siloxane type insulating films (k~3) have been mainly studied.
Among them, the fluorinated siloxane type insulating films are a film having Si—O—Si networks terminated by Si—F bonds (see Proceedings of VLSI Multilevel Interconnection Conference 1997, p. 119-124). The fluorine in the film reacts with a barrier metal
17
such as titanium nitride, tantalum nitride, etc. In order to prevent delamination, silicon oxide protective film
9
is used.
The organic polymer type insulating films include a film having networks made of carbon. As the polymer, benzocyclobutene type, aromatic resins, and the like are mainly studied. Since both the organic polymer film and the resist
6
are organic films, etching selectivity of the polymer to the resist is low. Thus, in order to obtain practical pattern processing conditions good in shape controlling properties, a silicon oxide protective film
9
is used as a hard mask (see Proceedings of International Interconnect Technology Conference 1999, p. 59-61).
The organic siloxane type insulating films are a film having Si—O—Si networks terminated by Si—R bonds (R is an organic group). As the R, it is general to use a methyl group excellent in heat resistance. As another component, it is possible to include Si—H bonds. The organic siloxane type insulating films have weak adhesiveness to a metal such as titanium nitride, tantalum nitride, etc. Thus, in order to prevent delamination of the metal during CMP, it is desirable to use as an adhesion layer a silicon oxide protective film
9
(see Semiconductor International November 1999, p. 56-64).
As a process for forming the organic siloxane type insulating film, there have been studied a process of spin coating an alcohol solution of methylalkoxy-silane oligomer (an organic spin-on glass liquid), followed by baking, and other various chemical vapor deposition (CVD) processes.
A typical example of forming an organic siloxane insulating film by CVD process is conducted by using an organic silane and an oxidizing gas. For example, there are disclosed a plasma CVD process using R
n
SiH
4−n
and an oxidizing gas (Proceedings of International Society for Optical Engineering (SPIE), vol. 3881, p. 8-14, 1999), and a plasma CVD process using (CH
3
)
3
SiH, N
2
O and He (Electrochemical Society Proceedings vol. 98-6, p. 145-152, 1998).
Another plasma CVD process using (CH
3
)
2
Si(OCH
3
)
2
and an inert gas is disclosed in the 60th Japan Society of Applied Physics Scientific Lectures, Preprint lp-ZN-9, 1999.9 held at Konan University. According to this report, the gas flow rate is reduced to about {fraction (1/10)} of usual flow rate in order to prolong the residence time of the gases in a reactor. The results of this report are reflected in JP-A 11-288931.
The above-mentioned low dielectric constant intermetal insulating films require a silicon oxide film as a protective film on an upper surface. Considering a practical process margin, the film thickness is required to be about 100 nm at the minimum. This thickness is about ⅓ of the wire thickness of fine wiring (e.g. about 300 nm in 0.18 &mgr;m-node CMOS devices). Thus, an effective dielectric constant between adjacent wires is greatly influenced by the dielectric constant of silicon oxide protective film (k~4) to make the dielectric constant higher than that of the low dielectric constant film per se.
Among the low dielectric constant films mentioned above, the use of a protective film is inevitable in the case of the fluorinated siloxane type insulating films and the organic polymer type insulating films. When the amount of fluorine in the fluorinated siloxane type insulating films is reduced, the low dielectric constant properties of the film are lost. In the case of the organic polymer type insulating films, the etching selectivity against resist etching cannot be enhanced essentially.
In contrast, in the case of the organic siloxane type insulating films, a component such as fluorine which reacts with the metal is not included. Furthermore, the selectivity against resist etching can be enhanced. Therefore, if the problem of delamination is solved, it is possible to use the organic siloxane type insulating films without using a silicon oxide protective film.
But, when the carbon in the film is remarkably large as in the case of the film formed by plasma CVD process using (CH
3
)
3
SiH, N
2
O, and He mentioned above, it is impossible to enhance the selective ratio against resist etching. When the carbon content is reduced, adhesiveness is clearly improved, but the dielectric constant is also increased.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device using as an intermetal insulating film an organic siloxane type insulating film having a low dielectric constant, and a high selectivity against resist etching and causing no problem of delamination without using a silicon oxide protective film, and a process for producing the same.
The present invention provides a semiconductor device including one or more intermetal insulating films, each intermetal insulating film containing at least silicon atoms, oxygen atoms, and carbon atoms with the number ratio of oxygen atom to silicon atom being 1.5 or more and the number ratio of carbon atom to silicon atom being 1 to 2, and having a shrinkage in the film thickness direction at a time of oxidation of 14% or less.
The present invention also provides a process for producing a semiconductor device comprising
a step of forming an intermetal insulating film using a mixed gas comprising
(i) a vapor of monomethyltriethoxysilane represented by the formula: RSi(OR′)
3
, wherein R is a methyl group and R′ is an ethyl group, and a non-oxidizing gas
(ii) a vapor of methylethoxysilane represented by the formula: R
n
Si(OR′)
4−n
, wherein R is a methyl group, R′ is an ethyl group, and n is 0 to 2, said vapor being mixed so as to make R 0.75 to 1.5 per silicon, and a non-oxidizing gas, or
(iii) (a) a vapor of monomethyltriethoxy-silane represented by the formula: RSi(OR′)
3
, wherein R and R′ are each methyl group, or (b) a vapor of methylmethoxysilane represented by the formula: R
n
Si(OR′)
4−n
, wherein R and R′ are each methyl g

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