Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-07-03
2003-02-11
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S337000, C257S341000, C438S259000, C438S309000, C438S138000
Reexamination Certificate
active
06518629
ABSTRACT:
The disclosure of Japanese Patent Application No. HEI 11-187880 filed on Jul. 1, 1999 including the specification, drawings and abstract is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having the characteristics of high voltage resistance and low ON voltage. The present invention also relates to a process for producing such a device , the manufacturing process providing a high yield and being simpler than know manufacturing processes.
2. Description of the Related Art
In semiconductor devices, such as IGBTs (insulated gate bipolar transistors) and the like, it is necessary to improve the breakdown resistance by extracting many holes from a p-channel region into an emitter electrode. However, simultaneously with the extraction of holes from the p-channel region, holes are also extracted from an n-drift region adjacent to the p-channel region, thereby causing a problem of an increased ON voltage.
To avoid this problem, a device structure in which insulation layers are provided between trench gates arranged with a predetermined pitch has been proposed (e.g., in Japanese Patent Application Laid-Open No. HEI 9-331063). When the semiconductor is in an OFF state, the insulation layers operate as capacitors so as to improve the breakdown voltage, and when the semiconductor is in an ON state, the insulation layers prevent holes from being drawn into p-channel regions and reduce the saturation voltage so as to reduce the ON voltage. The insulation layers are formed by silicon oxide films or the like, and extend in a direction of extension of trench gates, and have a reduced thickness of about 0.3 &mgr;m. This configuration of the insulation layers is considered to improve the breakdown voltage.
However, in the above-described device structure, the insulation layers are formed at a position that is shallower than the position of the bottoms of the trench gates, in view of the saturation voltage. Furthermore, the insulation layers are disposed so that the distance between the insulation layers and the trench gates become equal to a predetermined value. Therefore, the following problem occurs. If a misalignment occurs between the trench gates and the insulation layers so that the distance therebetween changes, the device or element characteristics are greatly affected.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide an improved structural arrangement for a semiconductor device that has the characteristics of high voltage resistance and low ON voltage.
An insulated gate type semiconductor device according to the invention includes a gate electrode, a drift region of a first conductivity type, a channel region of a second conductivity type, and a plurality of charge-storage regions formed near an interface between the drift region and the channel region. The charge-storage regions continuously extend in a direction intersecting a direction of extension of the gate electrode.
This structure achieves improved characteristics due to the charge-storage regions (insulation layer or the like) and, furthermore, has a characteristic configuration of the charge-storage regions. That is, the invention does not incorporate a charge-storage region that is formed as a single body (continuous body) extending parallel to a direction of extension of the insulated gate, but incorporates a plurality of charge-storage regions that extend in a direction intersecting the direction of extension of the gate. The charge-storage regions form a stripe pattern, leaving intervals (opening regions) between the charge-storage regions. The opening regions of the stripe pattern of the charge-storage regions function as channels. Therefore, the element characteristics (that is, voltage resistance or ON voltage) can be determined by the proportion of the opening regions in the stripe pattern.
As a result, the characteristics are not determined depending on the alignment with the insulated gate, and can easily be set. The charge-storage regions may have a length that extends substantially across an element cell. This structure also achieves uniform element characteristics regardless of the alignment with the insulated gate.
REFERENCES:
patent: 5814858 (1998-09-01), Williams
patent: 6218217 (2001-04-01), Uenishi et al.
patent: 6455902 (2002-09-01), Voldman
patent: 09-331063 (1997-12-01), None
Kang et al., Trench emitter IGBT with lateral and vertical MOS channels, Microelectronics, 2002. MIEL 2002. 23rdInternational Conference on, vol. 2002, pp. 163-166, vol. 1.
Kushida Tomoyoshi
Nishiwaki Katsuhiko
Chaudhuri Olik
Pillsbury & Winthrop LLP
Toyota Jidosha & Kabushiki Kaisha
Trinh (Vikki) Hoa B.
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