Semiconductor device and method of relaxing thermal stress

Details Semiconductor device and method of relaxing thermal stress Semiconductor device and method of relaxing thermal stress

2005-01-18

2005-01-18

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S701000, C257S703000, C257S704000, C257S710000

Reexamination Certificate

active

06844621

ABSTRACT:
A semiconductor device has an insulating substrate with conductor patterns bonded to and formed on both the top and bottom surfaces of a ceramic substrate. Soldering is provided between the conductor pattern on the top surface side and a heat developing chip component such as a power semiconductor element is mounted thereon. Between the conductor pattern on the bottom surface side and a heat dissipating metal base plate, each of four corners of the ceramic substrate is chamfered to form a chamfered section with a chamfered dimension of 2 to 10 mm. Alternatively, slits can be formed at the four corners on the bottom surface side. Moreover, the thickness of the conductor patterns can be controlled in relation to the ceramic substrate. These configurations relax the stress concentration created in the soldered section due to a thermal cycle.

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