Semiconductor device and method of manufacturing thereof

Details Semiconductor device and method of manufacturing thereof Semiconductor device and method of manufacturing thereof

1993-03-25

1994-09-27

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257548, 257549, 257550, 257370, 257371, 257376, H01L 2702

Patent

active

053509390

ABSTRACT:
An n.sup.- epitaxial layer 4 is formed on the top face of a p type semiconductor substrate 1. A p.sup.+ buried layer 20 is formed by implanting ions in the region extending over the p type semiconductor substrate 1 and the n.sup.- epitaxial layer 4. A p.sup.+ channel stop is formed in the upper layer of the p.sup.+ buried layer 20 by ion implantation. A p well is formed extending from the upper layer of the p.sup.+ channel stop to the top face of the n.sup.- epitaxial layer. An n channel MOS type field effect transistor 200 is formed in the p well 22. It is possible to reliably isolate an element from an adjacent element thereto because of the structure.

REFERENCES:
patent: 4525920 (1985-07-01), Jacobs et al.
patent: 4716451 (1987-12-01), Hsu et al.
Well and Buried Layer Structure Formed by Multiple Energy ion for Submicron C-BiCMOS High Speed BiCMOS VLSI Technology Buried Twin Well Structure Integration of a Double Polysilicon, Fully Self-Aligned Bipolar Transistor into a 0.5 um BiCMOS Technology for Fast 4MBit SRAMs.

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