Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate
2007-11-06
2007-11-06
Hoang, Quoc (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
C438S108000, C257S698000, C257SE23169
Reexamination Certificate
active
11329600
ABSTRACT:
A connection method is disclosed for a high-performance semiconductor system. The connection method enables high-speed operation with low noise, so as to obtain reliable and excellent connection in a short TAT at low costs. Semiconductor chips and the interposer chips are polished by grinding at their rear surfaces, holes are formed at rear surface positions corresponding to external electrode parts on the device side (front surface side) so that the holes extend to front surface electrodes, and metal plating films are applied to the side walls of the holes and rear surface side. Metal bumps of another semiconductor chip laminated at an upper stage being press-fitted into the holes applied with the metal plating films through deformation and being geometrically calked in the through holes formed in the semiconductor chip so as to electrically connected thereto.
REFERENCES:
patent: 2005/0263869 (2005-12-01), Tanaka et al.
Akazawa Takashi
Naito Takahiro
Tanaka Naotaka
Yoshimura Yasuhiro
Hoang Quoc
Renesas Technology Corp.
Townsend and Townsend / and Crew LLP
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