Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S284000

Reexamination Certificate

active

07547950

ABSTRACT:
A conventional semiconductor device has a problem that it is difficult to obtain a desired breakdown voltage characteristic due to a reduction in a punch-through breakdown voltage between drain and source regions. In a semiconductor device according to the present invention, a P type diffusion layer is formed in an N type epitaxial layer. An N type diffusion layer as a back gate region is formed in the P type diffusion layer. The N type diffusion layer is formed by self-alignment using a drain electrode. This structure makes it possible to increase an impurity concentration of the N type diffusion layer in a vicinity of a P type diffusion layer as a source region. As a result, it is possible to improve a punch-through breakdown voltage between the drain and the source regions, and to achieve a desired breakdown voltage characteristic of the MOS transistor.

REFERENCES:
patent: 5719421 (1998-02-01), Hutter et al.
patent: 5786252 (1998-07-01), Ludikhuize et al.
patent: 6359318 (2002-03-01), Yamamoto et al.
patent: 7247918 (2007-07-01), Tateyama
patent: 7279745 (2007-10-01), Otake
patent: 2006/0076612 (2006-04-01), Otake et al.
patent: 1770410 (2006-05-01), None
patent: 2001-291781 (2001-10-01), None

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