Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S328000, C257SE27096

Reexamination Certificate

active

11607328

ABSTRACT:
A semiconductor device having a vertical gate and method of manufacturing the same are disclosed. An example semiconductor device includes a pair of first source/drain regions formed apart from each other by a predetermined distance on a silicon substrate, a first silicon epitaxial layer formed on the pair of first source/drain regions, a vertical gate insulation layer formed at both sidewalls of the first silicon epitaxial layer, and a second silicon epitaxial layers formed on the first silicon epitaxial layer and on the gate insulation layer. The example device includes a pair of second source/drain regions formed in the second silicon epitaxial layer formed on the first silicon epitaxial layer, at positions above the pair of first source/drain regions, and a plurality of vertical gates respectively connected to the second silicon epitaxial layer formed on the gate insulation layer and to the pair of second source/drain regions.

REFERENCES:
patent: 6437389 (2002-08-01), Forbes et al.
patent: 2002/0109176 (2002-08-01), Forbes et al.
patent: 2004/0113207 (2004-06-01), Hsu et al.
patent: 10-2003-0088432 (2003-11-01), None
patent: 10-2004-0051506 (2004-06-01), None
Louis L. Hsu, Oleg Gluschenenkov, Jack A. Mandelman, and Carl J. Radens; Vertical Mosfet Sram Cell With Surrounded Gate to Obtain Improved Transconductance and Efficiency; Jun. 18, 2004; Publication No. 10-2004-0051506 A; Korean Patent Abstracts; Korean Intellectual Property Office, Republic of Korea.
Patent Abstract of Korea; Publication No. 10-2003-0088432; Nov. 19, 2003; Korean Intellectual Property Office, Republic of Korea.

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