Semiconductor device and method of manufacturing the same

Details Semiconductor device and method of manufacturing the same Semiconductor device and method of manufacturing the same

2006-12-26

2006-12-26

Estrada, Michelle (Department: 2823)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

C438S239000, C438S396000, C438S672000

Reexamination Certificate

active

07153727

ABSTRACT:
Disclosed herein are a semiconductor device and a method of manufacturing the same that increases the reliability of these devices as size design limitations decrease. Generally, a first insulating film, and wiring, including conductive film patterns and second insulating film patterns are formed on a substrate. Third insulating film patterns including a silicon-oxide-based material are formed on sidewalls of the wiring, and contact patterns and spacers on the sidewalls thereof for defining contact hole regions are formed on the wiring. The contact holes contact surfaces of the third insulating film patterns and pass through the first insulating film. Thus, the thickness of a second insulating film pattern used in the wiring can be minimized, thereby increasing a gap-fill margin between the wiring. A parasitic capacitance between the wiring can be reduced because silicon oxide spacers with a low dielectric constant are formed on sidewalls of the wiring.

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English Language of Japanese Abstract from Japanese Patent Publication No. JP2001-217405, published Oct. 8, 2001.
US Patent No. 6,127,734, which is an English language counterpart to German Publication No. DE 19610272.

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