Semiconductor device and method of manufacturing the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S622000, C438S637000, C438S675000

Reexamination Certificate

active

07091122

ABSTRACT:
Disclosed is a semiconductor device comprising a substrate, a first region provided on the substrate and comprising a first insulating portion which includes an insulating film having a relative dielectric constant of at most 3.0 and a conductive portion which is provided in the first insulating portion, a second region provided on the substrate, located adjacent to the first region in a direction parallel to a major surface of the substrate and comprising a second insulating portion which is located adjacent to the first insulating portion in the direction and which includes no insulating film having a relative dielectric constant of at most 3.0, and a pad provided on the second region and electrically connected to the conductive portion.

REFERENCES:
patent: 5700735 (1997-12-01), Shiue et al.
patent: 6265300 (2001-07-01), Bhansali et al.
patent: 6346471 (2002-02-01), Okushima
patent: 6465112 (2002-10-01), Ikura
patent: 53-56968 (1978-05-01), None
patent: 10-64938 (1998-03-01), None
patent: 11-162980 (1999-06-01), None
patent: 2000-299319 (2000-10-01), None
patent: 2000-340569 (2000-12-01), None
patent: 2001-267323 (2001-09-01), None
Matsunaga et al.; “Wiring Structure of Semiconductor Device”, U.S. Appl. No. 09/527,222, filed Mar. 16, 2000.
Decision of Rejection from Japanese Patent Office dated Jan. 4, 2005. and the English translation thereof.

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