Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2006-08-01
2006-08-01
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C438S687000
Reexamination Certificate
active
07084510
ABSTRACT:
A semiconductor device has an active element structure formed on a semiconductor substrate. A first insulating film is provided above the semiconductor substrate. A first interconnect layer composed of copper is provided in a surface of the first insulating film. A second insulating film is provided on the first insulating film. A connection hole is formed in the second insulating film and has its bottom connected to the first insulating layer. A connection plug composed of a single crystal of copper is filled in the connection hole so that no other crystals of copper are provided in the connection hole. An interconnect trench is formed in a surface of the second insulating film and has its bottom connected to the connection hole. A second interconnect layer is provided in the interconnect trench.
REFERENCES:
patent: 6251781 (2001-06-01), Zhou et al.
patent: 2002/0025675 (2002-02-01), Chu et al.
Norio Okada, et al., “Thermal Stress of 140nm-WIDTH Cu Damascene Interconnects”, Preceedings of the International Interconnect Technology Conference, 2002, pp. 136-138.
Higashi Kazuyuki
Matsunaga Noriaki
Flynn Nathan J.
Kabushiki Kaisha Toshiba
Sandvik Ben
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