Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2005-01-11
2005-01-11
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
C257S698000, C257S690000, C438S106000
Reexamination Certificate
active
06841849
ABSTRACT:
A depression is formed from a first surface of a semiconductor substrate on which is formed an integrated circuit. An insulating layer is provided on the inner surface of the depression. A first conductive portion is provided on the inside of the insulating layer. A second conductive portion is formed on the inside of the insulating layer and over the first conductive portion, of a different material from the first conductive portion. The first conductive portion is exposed from a second surface of the semiconductor substrate opposite to the first surface.
REFERENCES:
patent: 5767001 (1998-06-01), Bertagnolli et al.
patent: 6184060 (2001-02-01), Siniaguine
patent: A 60-7148 (1985-01-01), None
patent: A 60-7149 (1985-01-01), None
patent: A 2001-53218 (2001-02-01), None
patent: A 2001-326325 (2001-11-01), None
patent: WO 9819337 (1998-05-01), None
U.S. patent application Ser. No. 10/703,573, Miyazawa, filed Nov. 10, 2003.
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