Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-10-11
2004-11-09
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S676000, C257S686000, C257S693000, C257S731000, C257S736000, C257S774000, C257S778000, C257S781000
Reexamination Certificate
active
06815746
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and an electronic device with the semiconductor device built therein, and to, for example, a technology effective for application to a system memory module with a plurality of memory semiconductor chips (memory chips) built therein, and an electronic device with the system memory module built therein, e.g., an electronic device such as a personal digital assistant (PDA) or the like.
Electronic devices like a personal digital assistant, and a cellular telephone need a further size reduction and higher functioning. It is desirable to build a memory module (system memory module) having much larger capacity in these devices with increases in communications information thereof. As package forms for semiconductor devices adapted to such multi-functioning/densification, there are known package structures such as a BGA (Ball Grid Array), a CSP (Chip Size Package), etc.
As one method for manufacturing these BGA and CSP or the like, there has been known a method of mounting semiconductor chips (semiconductor elements) to predetermined locations or points on a main surface of a wiring board after the preparation of the wiring board (substrate), connecting electrodes of the semiconductor chips and wirings on the main surface of the wiring board by conductive wires, and thereafter covering the main surface side of the wiring board with an insulating encapsulating resin, and further providing protruded electrodes (bump electrodes) connected to respective wirings on the back surface of the wiring board to thereby fabricate a semiconductor device.
As a technology for downsizing the semiconductor device in the semiconductor manufacturing method, there is known a block molding method. The block molding method is a semiconductor manufacturing method including steps of mounting or packaging semiconductor chips on respective product forming areas of a wiring board having a plurality of the product forming areas, thereafter placing the wiring board within a molding die (forming die) having a large cavity, for covering the plurality of product forming areas, block-encapsulating the plurality of product forming areas with an encapsulating resin, and thereafter block-cutting an encapsulater and the wiring board by a dicing device to bring them into fractionization. The block molding method has been described in, for example, Unexamined Patent Publication No. 2000-12578 (U.S. Pat. No. 6,200,121).
SUMMARY OF THE INVENTION
Various semiconductor devices (ICs) have been built in the personal digital assistant (PDA). For example, a central processing unit (CPU), an application specific integrated circuit (ASIC), a synchronous dynamic random access memory (SDRAM: Synchronous Dynamic Random Access Memory) used as a memory, a flash memory, etc. are mounted on a printed circuit board (wiring board). Most of them are respectively mounted on the printed circuit board as single items. Therefore, the whole packaging area of these semiconductor devices increases and hence this interferes with the scale down of the electronic device such as PDA or the like. Each individual packaging of the semiconductor devices in the electronic device will produce a suspicion that the length of each of wirings for connecting between external electrode terminals of each semiconductor device becomes long, and bring about a possibility that a reduction in signal transfer speed and the like will occur.
On the other hand, an example (MCP: Multi Chip Package) in which a static memory (SRAM: Static Random Access Memory) and a flash memory (flash nonvolatile memory) used as memories are built in a single package, has been commercialized by various manufacturers. However, the example with the SDRAM and the flash memory integrated into one has not heretofore been attained. A main application for the MCP commercialized up to now is a memory for a cellular phone. This is because the SRAM low in power consumption as compared with the SDRAM is used in the cellular phone. However, since the PDS needs a memory having larger capacity, the SDRAM other than the SRAM is used.
An object of the present invention is to provide a small-sized and inexpensive semiconductor device wherein a dynamic random access memory such as a synchronous dynamic random access memory and a flash memory are built in a single encapsulater.
Another object of the present invention is to provide an electronic device capable of high-speed operation and downsizing.
The above, other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.
Summaries of typical ones of the inventions disclosed in the present application will be described in brief as follows:
(1) There is provided a semiconductor device, comprising:
a wiring board having a main surface, an insulating film formed on the main surface, and a plurality of electrodes formed on the main surface, the wiring board having external electrode terminals formed on a back surface used as a reverse side of the main surface;
semiconductor chips each having a main surface and a back surface and having one or more semiconductor elements and a plurality of electrodes formed on the main surface, the back surface being fixed to the main surface of the wiring board face to face therewith with an adhesive interposed therebetween;
conductive wires which connect electrodes on the main surface of the wiring board to electrodes of each semiconductor chip; and
an encapsulater which covers the semiconductor chips, the main surface of the wiring board and the electrodes,
wherein at least one dynamic random access memory chip with a dynamic random access memory built therein and at least one flash memory chip with a flash memory built therein are fixed to the wiring board as the semiconductor chips, and
the encapsulater and the wiring board respectively have side faces cut by dicing.
Described specifically, a flash memory chip and a dynamic random access memory chip both formed as rectangular are respectively fixed to the main surface of the wiring board side by side in a state in which a plurality of electrodes on their surfaces are being exposed and in such a manner that long sides thereof are respectively placed face to face with one another,
the flash memory chip includes a plurality of electrodes arranged along edges of short sides thereof,
a dynamic random access memory chip shorter than the flash memory chip is fixed onto the flash memory chip in a state in which the plurality of electrodes provided along both short sides of the flash memory chip are being exposed, and
the dynamic random access memory chip fixed to the main surface of the wiring board and the dynamic random access memory chip on the flash memory chip are identical in size and structure.
Address/data buses are connected to common electrodes among a plurality of the dynamic random access memory chips, and address/data buses are separated between the dynamic random access memory chip and the flash memory chip and connected to electrodes different from each other.
The electrodes of the flash memory chip are respectively disposed side by side in a row along edges of both short sides thereof,
the electrodes of the dynamic random access memory chip are disposed side by side along a long side thereof,
the address electrodes are larger in number than the data electrodes in an electrode row of one short side of the flash memory chip, and the data electrodes are larger in number than the address electrodes in an electrode row of the other short side of the flash memory chip,
the address electrodes are larger in number than the data electrodes in a half electrode row closed to one short side of the flash memory chip with respect to distributions of the address electrodes and data electrodes in the electrode rows of the dynamic random access memory chip, and
the data electrodes are larger in number than the address electrodes in a half electrode row closed to the other short side of the flash memory chip.
Fur
Kikuchi Takafumi
Shirakawa Seiichi
Sugita Norihiko
Suzuki Makoto
Mattingly Stanger & Malur, P.C.
Nelms David
Renesas Technology Corp.
Tran Mai-Huong
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