Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-03-08
2011-03-08
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S368000, C257S382000, C257S412000
Reexamination Certificate
active
07902612
ABSTRACT:
It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSi2layer through annealing; forming a Ni layer on the NiSi2layer; and silicidating the NiSi2layer through annealing.
REFERENCES:
patent: 4908331 (1990-03-01), Raaijmakers
patent: 5937315 (1999-08-01), Xiang et al.
patent: 6297148 (2001-10-01), Besser et al.
patent: 6329276 (2001-12-01), Ku et al.
patent: 6740587 (2004-05-01), Song et al.
patent: 7202147 (2007-04-01), Okuno et al.
patent: 2001/0032330 (2001-10-01), Kusunoki
patent: 2002/0036353 (2002-03-01), Song et al.
patent: 2004/0061228 (2004-04-01), Wieczorek et al.
patent: 2005/0145943 (2005-07-01), Schram et al.
patent: 2005/0250326 (2005-11-01), Matsuda
patent: 2005/0253205 (2005-11-01), Kawamura
patent: 2005/0253305 (2005-11-01), Kim et al.
patent: 2006/0051596 (2006-03-01), Jensen et al.
patent: 2006/0057844 (2006-03-01), Domenicucci et al.
patent: 2006/0130746 (2006-06-01), Terashima et al.
patent: 2006/0281305 (2006-12-01), Jung et al.
patent: 2007/0004203 (2007-01-01), Streck et al.
patent: 2007/0004205 (2007-01-01), Detavernier et al.
patent: 2007/0018255 (2007-01-01), Kawamura
patent: 2007/0054481 (2007-03-01), Chen et al.
patent: 2007/0096221 (2007-05-01), Frohberg et al.
patent: 2007/0141836 (2007-06-01), Yamauchi et al.
patent: 2007/0167009 (2007-07-01), Chen et al.
R.L. Thornton, “Schottky-Barrier Elevation by Ion Implantation and Implant Segregation”, Electronics letters, vol. 7, No. 14, Jul. 9, 1981, pp. 485-486.
A. Kinoshita, et al., “Successful CMOS Operation of Dopant-Segregation Schottky Barrier Transistors (DS-SBTs)”, Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials, Tokyo, A-5-1, 2004, pp. 172-173.
Morimoto, T., et al., Self-Aligned Nickel-Mono-Silicide Technology for High-Speed Deep Submicrometer Logic CMOS ULSI, IEEE Transaction on Electron Devices, vol. 42, No. 5, May 1995, pp. 915-922.
Aoki Nobutoshi
Kato Koichi
Kinoshita Atsuhiro
Koga Junji
Ohuchi Kazuya
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Pham Long
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