Semiconductor device and method of manufacturing the same

Details Semiconductor device and method of manufacturing the same Semiconductor device and method of manufacturing the same

1997-11-06

2000-05-30

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257306, 257408, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

060693797

ABSTRACT:
In a semiconductor device and a method of manufacturing the same, an isolating and insulating film is provided at an end neighboring to a second impurity region with a groove extended to a semiconductor substrate. This removes a crystal defect existed at the end of the isolating and insulating film, and thus prevents leak of a current at this portion from a storage node. Consequently, provision of the groove at the edge portion of the isolating oxide film neighboring to the impurity region removes a crystal defect at this region, and thus eliminates a possibility of leak of a current.

REFERENCES:
patent: 4207618 (1980-06-01), White, Jr. et al.
patent: 4433468 (1984-02-01), Kawamata
patent: 4512073 (1985-04-01), Hsu
patent: 4656732 (1987-04-01), Teng et al.
patent: 4794563 (1988-12-01), Maeda
patent: 4961165 (1990-10-01), Ema
patent: 4994893 (1991-02-01), Ozaki et al.
patent: 5045899 (1991-09-01), Arimoto
patent: 5047817 (1991-09-01), Wakamiya et al.
patent: 5066995 (1991-11-01), Young et al.
patent: 5082797 (1992-01-01), Chan et al.
patent: 5113234 (1992-05-01), Furuta et al.
patent: 5181090 (1993-01-01), Maruo
patent: 5208470 (1993-05-01), Lee et al.
patent: 5235199 (1993-08-01), Hamamoto et al.
patent: 5241200 (1993-08-01), Kuroda
patent: 5254865 (1993-10-01), Koshimaru
patent: 5396096 (1995-03-01), Akamatsu et al.
patent: 5426326 (1995-06-01), Ohyu et al.
patent: 5498887 (1996-03-01), Ohki et al.
patent: 5656853 (1997-08-01), Ooshi
patent: 5840621 (1998-11-01), Kasai
.5.mu.mIsolation Technology Using Advanced PolySilicon Pad LOCOS (APPL), by Toshiyuki Nishihara et al., IEEE, 1988.
Selective Oxide Etching to Silicon Nitride: by K. Harashima et al., Proceedings of Spring Seminar of the Japan Society of Applied Physics, 1994.
"Monthly Semiconductor World 1993.10", by Jeffrey Marks et al.
T. Fukasa et al., "A Margin-Free Contact process Using An Al(2)O(3) Etch-Stop Layer For High Density Devices", IEDM Tech. Dig., pp. 837-840, 1992, Dec. 1992.
M. Fukumoto et al., "Double Self-aligned Contact Technology for Shielded Bit line Type Stacked Capacitor cell of 16 MDRAM", IEICE Transactions, vol. E74, No. 4, pp. 818-826, Apr. 1991.

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