Semiconductor device and method of manufacturing semiconductor d

Details Semiconductor device and method of manufacturing semiconductor d Semiconductor device and method of manufacturing semiconductor d

1997-05-28

1998-09-01

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Total dielectric isolation

438404, 438405, 438443, H01L 2176

Patent

active

058010815

ABSTRACT:
The present invention relates to a method of manufacturing a semiconductor device for forming an insulated gate field effect transistor in a completely isolated SOI layer, and has for its object to prevent depletion or inversion surely by introducing impurities of sufficiently high concentration into an SOI layer adjacent to an isolating film filled up between element regions of the SOI layer and a backing insulating layer and to aim at flattening of the SOI substrate surface, and further, includes the steps of implanting impurity ions into a semiconductor layer from an oblique direction so as to reach the semiconductor layer under an oxidation-preventive mask using the oxidation-preventive mask as a mask for ion implantation, heating the semiconductor layer in an oxidizing atmosphere with the oxidation-preventive mask so as to form a local oxide film to isolate the semiconductor layer, and also forming a impurity region with impurities implanted into the semiconductor layer in a region adjacent to the local oxide film and to at least an insulating layer under the semiconductor layer.

REFERENCES:
patent: 4889829 (1989-12-01), Kawai
patent: 5125007 (1992-06-01), Yamaguchi et al.
patent: 5426062 (1995-06-01), Hwang
patent: 5547886 (1996-08-01), Harada
H. Fukuda, et al., "High-Performance Buried-Gate MOFETs with RTO-grown Ultrathin Gate Oxide Films", Extended Abstracts, Makuhari, 1993, pp. 17-19.
M. Haond, et al., Lateral Isolation in SOI CMOS Technology, Solid State Technology, Jul. 1991, pp. 47-52.

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