Semiconductor device and method of manufacturing same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S371000, C257S412000, C257SE29255

Reexamination Certificate

active

08030711

ABSTRACT:
A method of manufacturing a semiconductor device, comprises: forming a high dielectric gate insulating film in an nMIS formation region and a pMIS formation region of a semiconductor substrate; forming a first metal film on the high dielectric gate insulating film, the first metal film; removing the first metal film in the nMIS formation region; forming a second metal film on the high dielectric gate insulating film of the nMIS formation region and on the first metal film of the pMIS formation region; and processing the first metal film and the second metal film. The high dielectric gate insulating film has a dielectric constant higher than a dielectric constant of silicon oxide. The first metal film does not contain silicon and germanium. The second metal film contains at least one of silicon and germanium.

REFERENCES:
patent: 6992357 (2006-01-01), Matsuo et al.
patent: 7344934 (2008-03-01), Li
patent: 2002/0151125 (2002-10-01), Kim et al.
patent: 2005-142539 (2005-06-01), None
patent: WO 2004/093182 (2004-10-01), None
Cartier et al., “Systematic studyof pFEV Vtwith Hf-based gate stacks with poly-Si and FUSI gates,” Symposium of VLSI Technology, Digest of Technical Papers (2004), pp. 44-45.
Chow et al., “Plasma Etching of Refractory Gates for VLSI Applications,” J. Electrochm. Soc. (Oct. 1984), 131:2325-35.
Notification of Reason(s) for Refusal issued by the Japanese Patent Office on Nov. 30, 2010, for Japanese Patent Application No. 2005-310392, and English-language translation thereof.
Samavedam et al., “Dual-Metal Gate CMOS with HfO2Gate Dielectric,” IEDM (2002), pp. 433-436.

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