Semiconductor device and method of manufacturing a gate stack

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S197000, C438S594000, C257S411000, C257S412000

Reexamination Certificate

active

07741201

ABSTRACT:
The semiconductor device includes a semiconductor substrate, a gate insulating film formed in contact with an upper side of the semiconductor substrate, and a gate electrode formed on the upper side of the gate insulating film and made of metal nitride or metal nitride silicide. A buffer layer for preventing diffusion of nitrogen and silicon is interposed between the gate insulating film and the gate electrode. Preferably, the buffer layer has a thickness of 5 nm or less. In the case where gate electrode contains Ti elements, and the gate insulating film contains Hf elements, the buffer layer preferably contains a titanium film.

REFERENCES:
patent: 6262458 (2001-07-01), Hu
patent: 6294819 (2001-09-01), Sun
patent: 6879001 (2005-04-01), Yagishita et al.
patent: 2005/0148127 (2005-07-01), Jung et al.
patent: 2001-203276 (2001-07-01), None
Moon Sig Joo, et al., “Behavior of Effective Work Function in Metal/High-K Gate Stack Under High Temperature Process”, Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials, pp. 202-203.
“Process Integration, Devices, and Structures”, 2003 Edition of ITRS (International Technology Roadmap for Semiconductors) (http://public.itrs.net/Files/2003ITRS/Home2003.htm), pp. 1-37.
U.S. Appl. No. 11/736,959, filed Apr. 18, 2007, Mori, et al.

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