Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
2011-03-01
2011-03-01
Monbleau, Davienne (Department: 2893)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C257SE21238, C257SE31061
Reexamination Certificate
active
07897483
ABSTRACT:
Objects are to reduce damage to a semiconductor integrated circuit by external stress and to increase the manufacturing yield of a thinned semiconductor integrated circuit. A single crystal semiconductor layer separated from a single crystal semiconductor substrate is used for a semiconductor element included in the semiconductor integrated circuit. Moreover, a substrate which is formed into a thin shape and provided with the semiconductor integrated circuit is covered with a resin layer. In a separation step, a groove for separating a semiconductor element layer is formed in the supporting substrate, and a resin layer is provided over the supporting substrate in which the groove is formed. After that, the resin layer and the supporting substrate are cut in the groove so as to be divided into a plurality of semiconductor integrated circuits.
REFERENCES:
patent: 5261156 (1993-11-01), Mase et al.
patent: 5401330 (1995-03-01), Saito et al.
patent: 5757456 (1998-05-01), Yamazaki et al.
patent: 5834327 (1998-11-01), Yamazaki et al.
patent: 6118502 (2000-09-01), Yamazaki et al.
patent: 6362866 (2002-03-01), Yamazaki et al.
patent: 6855961 (2005-02-01), Maruyama et al.
patent: 6882012 (2005-04-01), Yamazaki et al.
patent: 6900873 (2005-05-01), Yamazaki et al.
patent: 7050138 (2006-05-01), Yamazaki et al.
patent: 7067395 (2006-06-01), Maruyama et al.
patent: 7214555 (2007-05-01), Yamazaki et al.
patent: 7271858 (2007-09-01), Yamazaki et al.
patent: 7352044 (2008-04-01), Yamada et al.
patent: 7446843 (2008-11-01), Yamazaki et al.
patent: 2003/0071953 (2003-04-01), Yamazaki et al.
patent: 2005/0070038 (2005-03-01), Yamazaki et al.
patent: 2005/0121672 (2005-06-01), Yamazaki et al.
patent: 2005/0157242 (2005-07-01), Yamazaki et al.
patent: 2006/0044300 (2006-03-01), Koyama et al.
patent: 2006/0065960 (2006-03-01), Maruyama et al.
patent: 2006/0270195 (2006-11-01), Yamada et al.
patent: 2007/0026639 (2007-02-01), Noma et al.
patent: 2007/0115416 (2007-05-01), Yamazaki et al.
patent: 2008/0188022 (2008-08-01), Yamazaki et al.
patent: 2009/0004764 (2009-01-01), Ohnuma et al.
patent: 2009/0174023 (2009-07-01), Takahashi et al.
patent: 07-014880 (1995-01-01), None
patent: 08-250745 (1996-09-01), None
patent: 08-264796 (1996-10-01), None
patent: 2001-064029 (2001-03-01), None
patent: 2003-255386 (2003-09-01), None
US 7,359,010, 04/2008, Yamazaki et al. (withdrawn)
Adachi Hiroki
Monma Yohei
Takahashi Hidekazu
Yamada Daiki
Yamazaki Shunpei
Monbleau Davienne
Reames Matthew
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
LandOfFree
Semiconductor device and method of manufacturing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of manufacturing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of manufacturing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2619630