Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2001-08-30
2003-07-15
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S668000, C257S666000, C257S676000, C257S735000, C257S688000, C257S738000, C257S692000, C257S693000, C257S773000
Reexamination Certificate
active
06593648
ABSTRACT:
Japanese Patent Application No. 2000-263669, filed Aug. 31, 2000, and Japanese Patent Application No. 2001-261175, filed Aug. 30, 2001 are hereby incorporated by reference in their entirety.
FIELD OF THE INVENTION
The present invention relates to a semiconductor device and method of manufacture thereof, a circuit board, and an electronic instrument.
BACKGROUND
When high-density mounting is required of semiconductor devices, bare chip mounting is ideal. However, a bare chip presents problems of quality assurance and handling. In response to this, semiconductor devices have been developed to which CSP (Chip Scale/Size Package) is applied. There is no formal definition of CSP, but generally it is understood to refer to an IC package with a package size the same as an IC chip, or very slightly larger than an IC chip. To advance high-density mounting, the development of CSP technology is important.
In the development of semiconductor devices, it is also important to realize a construction which effectively absorbs thermal stress. Thermal stress arises from the difference in the coefficient of thermal expansion between the semiconductor device and the circuit board on which the semiconductor device is mounted. Conventionally, to absorb this thermal stress, it is known to provide an elastic resin. However, to further improve the reliability of the semiconductor device, yet more effective stress absorption is required.
SUMMARY OF THE INVENTION
A method of manufacturing a semiconductor device according to the present invention comprises the steps of:
providing a semiconductor chip having electrodes to face a tape having a plurality of first holes, a support member surrounded by the first holes, and leads extending across the first holes to the support member;
bonding the electrodes to the leads;
cutting the leads in the first holes; and
bending the leads into go around a lateral portion of the support member.
Another method of manufacturing a semiconductor device according to the present invention comprises the steps of:
providing a semiconductor chip having electrodes to face a tape having a plurality of first holes, a support member surrounded by the first holes and having a second hole, and leads extending across the first holes to the second hole of the support member;
bending the leads in the second hole; and bonding the electrodes to the leads in the first holes.
A semiconductor device according to the present invention comprises:
a semiconductor chip having electrodes;
leads to one extremity of which the electrodes are bonded; and
a support member supporting the leads, avoiding the other extremity,
wherein the semiconductor chip is disposed on the side of the support member of the leads, and
wherein the other extremity of the leads is bent so as to go around a lateral portion of the support member.
Another semiconductor device according to the present invention comprises:
a semiconductor chip having electrodes;
leads to one extremity of which the electrodes are bonded; and
a support member supporting the leads, avoiding the other extremity, and having a hole,
wherein the semiconductor chip is disposed on the side of the support member of the leads, and
wherein the other extremity of the leads is bent into the hole in the support member.
A circuit board according to the present invention has mounted any of the above described semiconductor devices.
An electronic instrument according to the present invention has any of the above described semiconductor devices.
REFERENCES:
patent: 4278991 (1981-07-01), Ritchie et al.
patent: 4460825 (1984-07-01), Haghiri-Tehrani et al.
patent: 4873615 (1989-10-01), Grabbe
patent: 5923538 (1999-07-01), Hawthorne
patent: 6049128 (2000-04-01), Kitano et al.
patent: 5-235091 (1993-09-01), None
patent: 5-291361 (1993-11-01), None
patent: 7-153793 (1995-06-01), None
patent: 7-201912 (1995-08-01), None
patent: 10-107198 (1998-04-01), None
Flynn Nathan J.
Greene Pershelle
Oliff & Berridg,e PLC
Seiko Epson Corporation
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