Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2011-08-30
2011-08-30
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S622000, C438S637000, C438S659000, C438S687000, C257SE21218, C257SE21252, C257SE21576, C257SE21589, C257SE21591
Reexamination Certificate
active
08008186
ABSTRACT:
A semiconductor device according to an embodiment of the present invention includes a semiconductor substrate; a wiring formed in predetermined pattern above the semiconductor substrate, a first insulating film lying right under the wiring, and a second insulating film lying in a peripheral portion other than a portion right under the wiring, in which a surface layer of the first insulating film lying in a boundary surface between the first insulating film and the second insulating film is chemically modified to reinforce the surface layer.
REFERENCES:
patent: 6096648 (2000-08-01), Lopatin et al.
patent: 6346438 (2002-02-01), Yagishita et al.
patent: 6531403 (2003-03-01), Ezaki
patent: 7026715 (2006-04-01), Matsunaga et al.
patent: 7091618 (2006-08-01), Yoshizawa et al.
patent: 7329601 (2008-02-01), Miyajima
patent: 7615474 (2009-11-01), Kurosawa
patent: 2002/0187625 (2002-12-01), Shimooka et al.
patent: 2003/0001278 (2003-01-01), Kojima et al.
patent: 2005/0116357 (2005-06-01), Fitzsimmons et al.
patent: 2005/0151266 (2005-07-01), Yoshizawa et al.
patent: 2006/0046472 (2006-03-01), Sandhu et al.
patent: 2006/0261483 (2006-11-01), Tsumura et al.
patent: 2002-353308 (2002-12-01), None
K. Tsumura, U.S. PTO Notice of Allowance, U.S. Appl. No. 11/485,636, dated Nov. 17, 2009, 7 pages.
K. Tsumura, U.S. PTO Office Action, U.S. Appl. No. 11/485,636, dated Apr. 17, 2009, 8 pages.
K. Tsumura, U.S. PTO Final Office Action, U.S. Appl. No. 11/485,636, dated Dec. 15, 2008, 10 pages.
K. Tsumura, U.S. PTO Office Action, U.S. Appl. No. 11/485,636, dated Jun. 4, 2008, 11 pages.
U.S. Appl. No. 11/248,608, filed Oct. 13, 2005, Tsumura et al.
Tsumura Kazumichi
Yamada Masaki
Foley & Lardner LLP
Kabushiki Kaisha Toshiba
Lebentritt Michael S
LandOfFree
Semiconductor device and method of fabricating the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of fabricating the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of fabricating the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2768522