Semiconductor device and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C438S387000, C438S396000, C438S397000, C438S257000

Reexamination Certificate

active

08044467

ABSTRACT:
A semiconductor device with reduced contact resistance between a substrate and a plug includes a gate electrode disposed over the substrate, the plug formed over the substrate at both sides of the gate electrode and having a sidewall with a positive slope, a capping layer disposed between the gate electrode and the plug, and a gate hard mask layer whose sidewall disposed over the gate electrode is extended to a top surface of the capping layer. By employing the capping layer having a sidewall with a negative slope, the plug having the sidewall with a positive slope can be formed regardless of a shape or profile of the sidewall of the gate electrode. As a result, the contact area between the substrate and the plug is increased.

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patent: 10-0642761 (2006-10-01), None
patent: 1020100004649 (2010-01-01), None
Office Action dated Sep. 7, 2010, for Korean application No. 10-2008-0082417.

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