Semiconductor device and method for the fabrication thereof

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S778000, C438S781000

Reexamination Certificate

active

06214748

ABSTRACT:

FIELD OF THE INVENTION
This invention pertains to a process for the formation of electrically insulating films having low dielectric constants and to semiconductor devices that have an interconnect structure comprising at least one electrically conductive layer with an interposed insulating layer. The invention also relates to methods for the fabrication of semiconductor devices of this type.
BACKGROUND OF THE INVENTION
The increasing miniaturization of semiconductor elements (the increasingly high degree of integration of semiconductor devices) has led to the use of multilevel interconnect structures on semiconductor substrates. In order to reduce parasitic capacitance between conductors, material consisting mainly of silicon oxide is generally used for the insulating layers in such semiconductor devices.
Insulating thins films of silica are known for use as protective layers and as insulating layers in electronic devices. The use of wet-coating compositions to form the layers is generally well known. For example, U.S. Pat. No. 4,756,977 teaches a process for coating electronic devices with a silica thin film by applying a solvent solution of hydrogen silsesquioxane resin on a substrate, evaporating the solvent, and then heating at temperatures of 150° C. to 1000° C. to effect conversion into ceramic like silica.
It is also known that the dielectric constant of the insulating thin film can be reduced by executing the insulating thin film itself as a porous structure. For example, U.S. Pat. No. 5,548,159 has described the formation of an insulating thin film with a porous structure through the use of the baked product of hydrogen silsesquioxane resin as the dielectric layer in a highly integrated circuit. This patent, however, does not disclose a specific method for the formation of the porous structure.
Because the miniaturization of semiconductor elements leads to increasingly small interconnect gaps and increasingly high aspect ratios between interconnects, large film thicknesses and an excellent capacity to fill between interconnects are required of the insulating layers. Highly integrated circuits with interconnect gaps declining below 0.18 &mgr;m have been designed for semiconductor devices in recent years. While highly integrated circuits of this type require that the dielectric constant of the insulating layers be brought below 2.7, even insulating layers formed from hydrogen silsequioxane resin have been unable to achieve such dielectric constants.
An object of this invention is to provide a process for forming insulating thin films that have a low dielectric constant.
A further object of this invention is to provide semiconductor devices having low dielectric constant insulating layers therein and to the method for the fabrication thereof.
SUMMARY OF THE INVENTION
This invention pertains to a method for forming electrically insulating thin films wherein the method comprises coating the surface of a substrate with a composition comprising
(A) a resin selected from the group consisting of electrically insulating, heat-curing organic resins and electrically insulating, heat-curing inorganic resins; and
(B) a solvent capable of dissolving resin (A) and
(C) a solvent whose boiling point or vapor pressure curve or affinity for resin (A) differs from that of solvent (B);
evaporating at least a portion of the solvents (B) and (C); and subsequently exposing the substrate to high energy radiation and inducing evaporation of the remaining solvents during the course of or after the cure of resin (A).
This invention also pertains to a method for forming electrically insulating thin films wherein the method comprises coating the surface of a substrate with a composition comprising
(A) a resin selected from the group consisting of electrically insulating, heat-curing organic resins and electrically insulating, heat-curing inorganic resins; and
(B) a solvent capable of dissolving the resin (A); and
(D) a substance that is soluble in solvent (B) and that can generate gas in the temperature range of from 0° C. to 800° C. by heating or by interaction with resin (A);
evaporating the solvent (B); and subsequently exposing the substrate to high energy radiation and inducing the generation of gas from the substance (D) during the course of or after the cure of the resin (A).
The processes of this invention results in a porosification or dedensification of the thin film and reduction in the dielectric constant to below 2.7. This makes possible an adequate attenuation in the parasitic capacitance between interconnects for semiconductor devices in which an interconnect structure comprising at least one electrically conductive layer is provided on the surface of a semiconductor substrate with separation by an interposed electrically insulating layer—even in the case of highly integrated circuits in which the interconnect gap is narrower than 0.18 &mgr;m.


REFERENCES:
patent: 4756977 (1988-07-01), Haluska et al.
patent: 5238787 (1993-08-01), Haluska et al.
patent: 5494859 (1996-02-01), Kapoor
patent: 5527737 (1996-06-01), Jeng
patent: 5548159 (1996-08-01), Jeng
patent: 5561318 (1996-10-01), Gnade et al.
patent: 5609925 (1997-03-01), Camilletti et al.
patent: 5728630 (1998-03-01), Nishimura et al.
patent: 0 462 715 A1 (1991-12-01), None

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