Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-04-19
2000-10-24
Smith, Matthew
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438618, H01L 214763
Patent
active
061366838
ABSTRACT:
A semiconductor device e.g. a gate array, a mask ROM or the like produced by supplementing one or more upper-layer interconnections to units selected out of those previously produced in a half-finished semiconductor device, wherein the upper-layer interconnections are connected exclusively with the selected ones of the foregoing units and are isolated from the unselected ones of the foregoing units, by a space or an insulator layer produced between the upper-layer interconnection and a layer in which conductive paths are produced for connecting the upper-layer interconnection and the foregoing units.
REFERENCES:
patent: 4692190 (1987-09-01), Komatsu
patent: 5208658 (1993-05-01), Murata
patent: 5918146 (1999-06-01), Yamashita
patent: 6004887 (1999-12-01), Matsuno
OKI Electric Industry Co., Ltd.
Rocchegiani Renzo
Smith Matthew
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