Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-08-23
2011-08-23
Ngo, Ngan (Department: 2893)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S401000, C257SE27062
Reexamination Certificate
active
08004045
ABSTRACT:
First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1′ of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2′ of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.
REFERENCES:
patent: 4912065 (1990-03-01), Mizuno et al.
patent: 7138305 (2006-11-01), Datta et al.
patent: 7800165 (2010-09-01), Sasaki et al.
patent: 2004/0036038 (2004-02-01), Okumura et al.
patent: 2005/0116218 (2005-06-01), Yang
patent: 2005/0280102 (2005-12-01), Oh et al.
patent: 2006/0084204 (2006-04-01), Yin et al.
patent: 2006/0157749 (2006-07-01), Okuno
patent: 2006/0220131 (2006-10-01), Kinoshita et al.
patent: 2007/0004117 (2007-01-01), Yagishita
patent: 2007/0082437 (2007-04-01), Cheng et al.
patent: 2007/0090408 (2007-04-01), Majumdar et al.
patent: 2007/0096196 (2007-05-01), Hofmann et al.
patent: 2007/0148836 (2007-06-01), Cheng et al.
patent: 2007/0155075 (2007-07-01), Kim et al.
patent: 2007/0158700 (2007-07-01), Koh et al.
patent: 2007/0184627 (2007-08-01), Cho et al.
patent: 2007/0210355 (2007-09-01), Izumida
patent: 2007/0235819 (2007-10-01), Yagishita
patent: 2008/0050897 (2008-02-01), Kottantharayil
patent: 2008/0179683 (2008-07-01), Sasaki et al.
patent: 2009/0181526 (2009-07-01), Okumura et al.
patent: 2009/0233383 (2009-09-01), Okumura et al.
patent: 2011/0033989 (2011-02-01), Choi et al.
patent: 2011/0037141 (2011-02-01), Kim et al.
patent: 01-295416 (1989-11-01), None
patent: 2006-196821 (2006-07-01), None
patent: WO 2006/064772 (2006-06-01), None
patent: WO 2006/098109 (2006-09-01), None
patent: WO 2006/106872 (2006-10-01), None
Khajetoorians, A. A., et al., “Dopant characterization of fin field-effect transistor structures using scanning capaciktance microscopy”, J. Appl. Phys, Feb. 9, 2007, vol. 101 No. 3, American Institute of Physics.
Lenoble, D., et al., “Enhanced performance of PMOS MUGFET via integration of conformal plasma-doped source/drain extensions”, Symposium on VLSI Technology Digest of Technical Papers, 2006, p. 212, IEEE.
United States Office Action issued in U.S. Appl. No. 12/193,861, dated Feb. 16, 2011.
Kanada Hisataka
Mizuno Bunji
Nakamoto Keiichi
Okashita Katsumi
Sasaki Yuichiro
McDermott Will & Emery LLP
Ngo Ngan
Panasonic Corporation
LandOfFree
Semiconductor device and method for producing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for producing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for producing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2715416