Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-11-29
2001-03-27
Ngô ;, Ngâ ;n V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S347000, C257S360000, C257S361000
Reexamination Certificate
active
06207996
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor integrated circuit device having an SOI (Silicon on Insulator) structure. More particularly, the invention is concerned with an SOI static electricity protection circuit for preventing an internal circuit from being damaged due to static electricity or the like to be inputted through the input/output pad, and the internal circuit.
In general, a static electricity protection circuit is provided between an input/output pad and an internal circuit to instantaneously release high voltage, such as static electricity, having been inputted through the input/output pad into regions other than the internal circuit (silicon substrate or the like). Due to this, the internal circuit (particularly, a MOSFET gate oxide film) is prevented from being damaged due to a high voltage as this.
The static electricity protection circuits as above involve avalanche breakdown at PN junctions, snap back owing to MOSFET bipolar operation, punch through by punch-through devices, and so on. The static electricity protection circuits of these types have a performance that the possibility of applying a high voltage to an internal circuit can be decreased with decrease in resistance over a high-voltage releasing path. Furthermore, prevention is also made against thermal breakdown to be caused due to flow of an overcurrent by the static electricity protection circuit itself. That is, static electricity protection performance is enhanced. The resistance is almost determined principally by an area of a PN junction of the static electricity protection circuit through which a high voltage current is to flow and a volume of a substrate.
For static electricity protection circuits made in a bulk structure, the PN junction has an area corresponding to an area of a side surface plus that of a bottom surface thereof, accordingly being sufficient in junction area. Also, the volume is sufficient because the substrate itself corresponds to a bulk.
Meanwhile, the SOI structure includes a buried oxide film on a silicon substrate, and a silicon layer of a first conductivity type in which semiconductor elements are to be built on the buried oxide film.
Recently, in order to realize high speed operation with low power consumption for an internal circuit formed in a silicon layer, there are necessities to completely deplete a MOSFET forming an internal circuit and reduce source and drain capacitance. Due to this, there is a tendency of decreasing the thickness of a silicon layer. In a case that a static electricity protection circuit made in a bulk structure for a semiconductor device is applied directly to a semiconductor device having an SOI structure as stated before, the reduction in silicon layer thickness is meant to decrease the volume of a substrate due to a reduction in thickness of the first conductivity type silicon layer as a substrate besides the decrease in PN junction area due to reduction in PN junction side surface area and losing a bottom surface area.
That is, recently there has been a difficulty in applying a static electricity protection circuit made in a bulk structure for a semiconductor device directly to an SOI-structured semiconductor device, because of the reason as discussed above.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide, in a semiconductor device having an SOI structure, an SOI static electricity protection circuit which is capable of properly protecting an internal circuit against a high voltage, such as static electricity, to be inputted through an input/output pad without lowering the performance of the internal circuit.
A semiconductor device having an SOI structure according to the present invention comprises: a silicon substrate of a first conductivity type; a buried oxide film formed on the silicon substrate; a first silicon layer of a first conductivity type formed on the buried oxide film; a second silicon layer of the first conductivity type formed on the buried oxide film and having a thickness smaller than the first silicon layer; an SOI static electricity protection circuit provided between an input/output pad and an internal circuit; wherein the internal circuit is formed in the second silicon layer of the first conductivity type, and the SOI static electricity protection circuit is formed in the first silicon layer of the first conductivity type.
As stated before, the formation of an SOI static electricity protection circuit in the thick first first-conductivity-type silicon layer can increase the area of a PN junction for the SOI static electricity protection circuit as well as the volume of the SOI static electricity protection circuit in the substrate, improving protection performance for the SOI static electricity protection circuit. Furthermore, an internal circuit can be configured in the thin second first-conductivity-type silicon layer. Accordingly, the internal circuit is not degraded in performance.
Furthermore, the invention uses a method for manufacturing a semiconductor device comprising: a step of forming a buried oxide film in a silicon substrate of a first conductivity type; a step of selectively oxidizing a surface of the first-conductivity-type silicon layer on the buried oxide film and selectively forming an oxide film on the surface of the first-conductivity-type silicon layer; a step of stripping away the oxide film and thereby exposing a surface of a second first-conductivity-type silicon layer smaller in thickness than the first-conductivity-type silicon layer under the oxide film; and a step of forming an internal circuit in the second first-conductivity-type silicon layer and forming an SOI static electricity protection circuit for protecting the internal circuit against static electricity from an insert/output pad in the first first-conductivity-type silicon layer other than the second first-conductivity-type silicon layer.
The use of this method makes it possible to form on a same substrate a first first-conductivity-type silicon layer and a second first-conductivity-type silicon layer that are different in thickness. The formation of an SOI static electricity protection circuit in the thick first first-conductivity-type silicon layer can increase the area of a PN junction for the SOI static electricity protection circuit. Moreover, the SOI static electricity protection circuit at a substrate region can be increased in volume, improving protection performance for the SOI static electricity protection circuit. Furthermore, an internal circuit can be configured in the thin second first-conductivity-type silicon layer. Thus, the internal circuit is not degraded in performance. Furthermore, the second first-conductivity-type silicon layer has a surface provided flat and less in defects as compared to that formed by a method of machining or directly etching the first-conductivity-type silicon layer. Accordingly, Al interconnections for the internal circuit to be formed on the surface are prevented from suffering defects such as disconnection. Also, the boundary between the thick silicon layer and the thin silicon layer can be made in a lightly tapered form. This can prevent trouble of disconnection in an interconnection between the circuits, including the SOI static electricity protection circuit, formed in the thick silicon layer and the circuits, including the internal circuit, formed in the thin silicon layer.
Furthermore, the invention uses a method for manufacturing a semiconductor device comprising: a step of dividing a silicon substrate of a first conductivity type with a first silicon layer of the first conductivity type and a second silicon layer of the first conductivity type, forming a first buried oxide film underneath a surface of the first silicon layer of the first conductivity type, and forming a second buried oxide film in a region deeper than the first buried oxide film underneath a surface of the second silicon layer of the first conductivity type; and a step of forming an internal circuit in the second first-conductivity-type
Utsunomiya Fumiyasu
Yoshida Yoshifumi
Adams & Wilks
Ngô ; Ngâ ;n V.
Seiko Instuments Inc.
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