Semiconductor device and method for manufacturing the same

Details Semiconductor device and method for manufacturing the same Semiconductor device and method for manufacturing the same

2009-06-05

2011-12-27

Trinh, Hoa B (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S779000, C257S734000, C257SE23021, C257SE21499, C438S108000

Reexamination Certificate

active

08084869

ABSTRACT:
A technique permitting the reduction in size of a semiconductor device is provided. In a BGA type semiconductor device with a semiconductor chip flip-chip-bonded onto a wiring substrate, bump electrodes of the semiconductor chip are coupled to lands formed at an upper surface of the wiring substrate. The lands at the upper surface of the wiring substrate are coupled electrically to solder balls formed on a lower surface of the wiring substrate. Therefore, the lands include first type lands with lead-out lines coupled thereto and second type lands with lead-out lines not coupled thereto but with vias formed just thereunder. The lands are arrayed in six or more rows at equal pitches in an advancing direction of the rows. However, a row-to-row pitch is not made an equal pitch. In land rows which are likely to cause a short-circuit, the pitch between adjacent rows is made large, while in land rows which are difficult to cause a short-circuit, the pitch between adjacent rows is made small. By so doing, both prevention of a short-circuit and improvement of the layout density of lands are attained at a time.

REFERENCES:
patent: 7332800 (2008-02-01), Kikuchi et al.
patent: 7879655 (2011-02-01), Tsutsumi et al.
patent: 2003/0042618 (2003-03-01), Nose et al.
patent: 2004/0197959 (2004-10-01), Ujiie et al.
patent: 2005-012037 (2005-01-01), None

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