Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2006-09-26
2008-08-26
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S592000, C438S275000, C438S198000, C257SE21002
Reexamination Certificate
active
07416967
ABSTRACT:
According to an aspect of the invention, a semiconductor device comprises: a N-channel MIS transistor comprising; a p-type semiconductor layer; a first gate insulation layer formed on the p-type semiconductor layer; a first gate electrode formed on the first gate insulation layer; and a first source-drain region formed in the p-type semiconductor layer where the first gate electrode is sandwiched along a direction of gate length. The first gate electrode comprises a crystal phase including a cubic crystal of NiSi2which has a lattice constant of 5.39 angstroms to 5.40 angstroms.
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Takahashi, et al., “Dual Workfunction Ni-Silicide/HfSiON Gate Stacks by Phase-Controlled Full-Silicidation (PC-FUSI) Technique for 45-nm-node LSTP and LOP Devices”, International Electron Devices Meeting Technical Digest, pp. 4.4.1-4.4.4., (2004).
Biswas, et al., “Work function tuning of nickel silicide by co-sputtering nickel and silicon”, Applied Physics Letters 87, pp. 171908-1-171908-3, (2005).
Nakatsuka, et al., “Low-Temperature Formation of Epitaxial NiSi2Layers with Solid-Phase Reaction in Ni/Ti/Si(001) Systems”, Japanese Journal of Applied Physics, vol. 44, No. 5A, pp. 2945-2947, (2005).
Hayzelden, et al., “Silicide formation and silicide-mediated crystallization of nickel-implanted amorphous silicon thin films”, Journal of Applied Physics 73 (12), pp. 8279-8289, (Jun. 15, 1993).
Koyama Masato
Tsuchiya Yoshinori
Yoshiki Masahiko
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Novacek Christy L
Smith Zandra
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