Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-08-24
2004-11-23
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000, C257S298000, C257S303000, C257S306000, C257S325000
Reexamination Certificate
active
06822277
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, particularly to a semiconductor device including a process forming dielectric film on an electrode consisting of material oxidized easily by high temperature process. Further, the present invention relates to a dielectric capacitor, particularly to improvement of ferroelectricity thereof.
2. Description of the Related Art
Ferroelectric memory (FeRAM) is a device having superior characteristics in non-volatile performance, constant electric power operation, high speed writing-in, high rewrite resistance, etc., and is attracted recent years.
A ferroelectric capacitor used for the ferroelectric memory is made by that a tungsten plug
3
is formed on an oxide silicon layer
2
formed on a silicon substrate
1
and that a lower electrode
5
consisting of platinum, a ferroelectric layer
6
consisting of PZT (PbZr
x
Ti
1-x
O
3
) film, and an upper electrode
7
consisting of platinum are laminated as shown in FIG.
17
.
Using platinum for the lower electrode
5
is caused by the following reason. A PZT film must be formed on an orientation film. This is because forming it on an amorphous film damages ferroelectric performance, as orientation performance is bad. On the other hand, the lower electrode
5
must be formed at state insulated from the silicon substrate
1
. Because of that, an oxide silicon layer
2
is formed on the silicon substrate
1
. The oxide silicon layer
2
is amorphous. Generally, although film formed on amorphous becomes non-orientation film, platinum has a characteristic becoming an orientation film even if formed on the amorphous film. By this reason, platinum is often used for the lower electrode.
However in the above-mentioned, conventional ferroelectric capacitor, there are the following problems.
There is a problem that ferroelectric performance decreases by escapement of oxygen in the ferroelectric (PZT), aging, and repeat of polarization inversion because oxygen easily permeates through platinum. That is, there is the possibility that oxygen in the ferroelectric escapes between columnar crystals of the platinum as shown in FIG.
18
.
Further, the problem such as this appears not only in the ferroelectric memory but also similarly as in the capacitor using ferroelectric having high dielectric constant.
Further, although tantalum silicon nitride (TaSiN) is proposed for wiring barrier layer up to now, there is a problem that nitrogen generates upon oxidation and oxide film is formed by later heat treatment even in such wiring so as to decrease conductivity.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a ferroelectric capacitor or ferroelectric capacitor having high dielectric constant which deteriorate less by aging and repeat of polarization inversion not only at manufacturing, by solving the above-mentioned problem, preventing oxidation of substrate material.
Another object of the present invention is to provide a semiconductor device having wiring high in reliability without increase of resistivity.
In the present invention, “capacitor” indicates a structure providing electrodes at both sides of an insulator and includes any structure regardless of being used for storing electric charge or not.
The first aspect of the present invention is characterized by including an electrode formed on surface of a semiconductor substrate, wherein said electrode includes a barrier layer consisting of amorphous or microcrystal expressed by the following expression: M1
x
M2
1-x
(0<x <1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Further, said surface of semiconductor substrate is constructed by at least one kind of polysilicon, tungsten, cobalt, molybdenum, copper, these silicide, and alloy.
Another aspect of the present invention is characterized by comprising: a lower electrode formed on a semiconductor substrate; a dielectric layer formed on said lower electrode and constructed by ferroelectric or dielectric having high dielectric constant; and an upper electrode formed on said dielectric layer, wherein said lower electrode includes a barrier layer consisting of amorphous or microcrystal expressed by the following: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, C; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by having: a lower electrode formed on a semiconductor substrate; a dielectric layer formed on said lower electrode and constructed by ferroelectric or dielectric having high dielectric constant; and an upper electrode formed on said dielectric layer, wherein said electrode includes a barrier layer consisting of amorphous or microcrystal between said dielectric layer and said upper electrode expressed by the following expression: M1
x
M2
1-x
(0<x<1M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including an electrode formed on surface of a semiconductor substrate, wherein said electrode is constructed by amorphous or microcrystal single layer expressed by the following expression: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including process forming an electrode formed on surface of a semiconductor substrate and process forming a dielectric film on the upper layer thereof, wherein process forming said electrode includes process forming a barrier layer consisting of amorphous or microcrystal expressed by the following expression: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including: process forming a lower electrode on surface of a semiconductor substrate; process forming a dielectric layer consisting of ferroelectric or dielectric having high dielectric constant on said lower electrode; and process forming an upper electrode on said dielectric layer, wherein said process forming the lower electrode includes process forming amorphous or microcrystal expressed by the following expression so as to form a dielectric capacitor: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including: process forming a lower electrode on a semiconductor substrate; process forming a dielectric layer consisting of ferroelectric or dielectric having high dielectric constant on said lower electrode; process forming a barrier layer consisting of amorphous or microcrystal expressed by the following expression on said dielectric layer: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb); and process forming an upper electrode on said barrier layer so as to form a dielectric capacitor.
Another aspect of the present invention is characterized by including an electrode formed on surface of a semiconductor substrate, wherein said electrode is constructed by amorphous or microcrystal single layer expressed by the following expression: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
A semiconductor device of the present invention includes a barrier layer consisting of amorphous or microcrystal between an electrode and a dielectric layer expressed by the following expression: M1
x
M2
1-x
(0<x<1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
According to such the structure, barrier effect is large so as to prevent mutual diffusion of oxygen etc. and spike because the barrier layer consisting of the amorphous or microcrystal does not have clear grain boundary. Such the compound c
Nakamura Takashi
Tochimura Hiroshi
Morgan & Lewis & Bockius, LLP
Pham Long
Rao Shrinivas H.
Rohm & Co., Ltd.
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