Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-03-11
2004-08-10
Gurley, Lynne (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000, C438S614000, C438S615000, C438S617000
Reexamination Certificate
active
06774027
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and to a method for manufacturing the same In particular, this invention relates to a Tape Carrier Package (TCP).
2. Description of the Related Art
FIG. 18
is an oblique perspective view of a connecting portion at an inner lead and a bump electrode of the conventional semiconductor device. A plurality of bump electrodes
10
are formed on a main surface of a semiconductor chip
50
. Each bump electrode
10
is electrically connected to an inner circuit of the semiconductor chip
50
. A plurality of bump electrodes
10
are aligned at a peripheral portion of the semiconductor chip
50
. A metal layer
7
is formed under the bump electrodes
10
. At the peripheral bottom portion of the bump electrodes, an insulating layer
5
for protecting the semiconductor chip
50
is formed below the metal layer
7
. The bump electrodes have concave portions
10
a
at the central portions of the top surfaces thereof. Each bump electrode
10
is electrically connected to an inner lead
1
through a portion top
10
b
, which surrounds the concave potion
10
a
of the bump electrode
10
. A conductive material (for example, solder, tin, gold etc. . . . ) is used to connect the inner lead
1
and the bump
10
. Only one inner lead is shown in FIG.
18
. However, inner leads are formed on each bump electrode.
FIG. 19
shows a cross sectional view of the bump electrode
10
. The insulating layer
5
is formed over the semiconductor chip (not shown), and surrounds the bump electrodes. The metal layer
7
is formed on a pad electrode
13
. The metal layer
7
is also formed on the insulating layer
5
, which is formed on the peripheral portion of the pad electrode
13
. The bump electrode
10
is formed on the metal layer
7
. The inner lead
1
is electrically connected to the bump electrodes
10
at the top surface of the bump electrode using the conductive material.
The smaller the chip size becomes, the narrower the distance between inner leads becomes. The distance between inner leads is presently about 45-50 &mgr;m, and the distance between bump electrodes is presently about 15-20 &mgr;m. Therefore, the problems described with reference to the cross sectional views of FIG.
20
(
a
)-
20
(
c
) are sometimes encountered. These problems result in a short circuit on the semiconductor chip
50
.
A first problem is a bending of the inner lead during an inner lead bonding, which is used to connect the inner leads
1
and bump electrodes
10
. If an inner lead bends, the bent inner lead may electrically connect to an adjacent inner lead, or to an adjacent bump electrode as shown in FIG.
20
(
a
). Alternately, two bent inner leads
1
may contact each other across a gap between adjacent bump electrodes
10
as shown in FIG.
20
(
b
).
Another problem is the protrusion of the conductive material
15
. The protrusions of adjacent conductive materials
15
touch each other and connected as shown in FIG.
20
(
c
).
These problems are partially the result of the width of the inner lead being smaller than the thickness of the inner lead. Therefore, the inner lead
1
is easily bent in a horizontal direction because its width is only about 10-20 &mgr;m. Also, the inner lead
1
is connected on the peripheral portion
10
b
of the top surface of the bump electrode
10
, and is therefore easily bent in a horizontal direction. Further, the conductive material
15
tends to protrude because of the weight of the bonding tool used during inner lead bonding, and because of the melted state of the conductive material
15
prior to hardening.
A different structure of lead, which is called pin type lead, is disclosed in the application of Japanese laid open number HEI 5-251450. This technique places a pin-type lead in the concave portion
10
a
of the bump electrode
10
. However, a special lead called a pin type lead, and therefore a number of processes such as bonding of inner leads, transforming have to be redesigned and changed. Further, the process for manufacturing the semiconductor device becomes more complex and costly.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device and the method for manufacturing the same. A semiconductor device includes a semiconductor chip having a main surface, a bump electrode having the bottom surface over main surface of the semiconductor chip. The bump electrode further havs a top surface opposite the bottom surface and a first protrusion extending upwardly from the top surface. The semiconductor device has a lead electrically connected to the bump electrode, and the lead has a bottom surface which faces towards the top surface of the bump electrode and which is located below a top of the first protrusion.
A method for manufacturing a semiconductor device includes forming a pad electrode over a main surface of a semiconductor chip, sequentially forming a first insulating layer and a second insulating layer over a peripheral region of the pad electrode, and a non-peripheral region of the pad electrode remains exposed. The method for manufacturing a semiconductor device further includes forming a metal layer over at least portions of the non-peripheral region of the pad electrode and the second insulating, forming a bump electrode on the metal layer.
REFERENCES:
patent: 5034345 (1991-07-01), Shirahata
patent: 5448016 (1995-09-01), DiPaolo
patent: 5587337 (1996-12-01), Idaka et al.
patent: 6024274 (2000-02-01), Chang et al.
patent: 6049130 (2000-04-01), Hosomi et al.
patent: 6475897 (2002-11-01), Hosaka
patent: 2001/0040289 (2001-11-01), Kobayashi
patent: 05251450 (1993-09-01), None
Gurley Lynne
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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