Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-05-24
2004-03-02
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S290000, C257S293000, C257S431000, C257S458000, C257S499000, C438S059000, C438S202000, C438S145000
Reexamination Certificate
active
06700144
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including a photoelectric conversion portion and a transistor for signal processing and to a method for manufacturing the semiconductor device.
2. Description of the Related Art
FIG. 6
shows an example of a conventional photoelectric conversion semiconductor device. In
FIG. 6
, reference numeral
101
denotes a photoelectric conversion portion, and
102
denotes a control portion that controls a signal obtained by photoelectric conversion.
Reference numeral
107
denotes a first conduction type semiconductor substrate. The semiconductor substrate
107
is made of silicon whose impurity concentration is adjusted to about 1×10
20
atms/cm
3
by including boron as P-type impurities. Reference numeral
108
denotes a first conduction type intrinsic semiconductor layer (hereinafter, also referred to as I layer). The intrinsic semiconductor layer
108
is formed on the semiconductor substrate
107
with silicon that includes boron as P-type impurities in a concentration of about 1×10
12
atms/cm
3
to 1×10
13
atms/cm
3
. Reference numeral
109
denotes a second conduction type layer. The second conduction type layer
109
is formed on the intrinsic semiconductor layer
108
with silicon whose impurity concentration is adjusted by including phosphorus as N-type impurities. This continuous structure of P-type layer—I layer—N-type layer constitutes a PIN diode for photoelectric conversion. A second conduction type diffusion layer
115
is used as an anode, and a first conduction type diffusion layer
116
is used as a cathode.
The control portion
102
includes a NPN bipolar transistor
103
, a PNP bipolar transistor
104
, a P-channel MIS transistor
105
, and a N-channel MIS transistor
106
.
Reference numeral
110
denotes a diffusion isolation region, which separates the photoelectric conversion portion
101
and the control portion
102
by a PN junction, and further separates the NPN bipolar transistor
103
and the PNP bipolar transistor
104
.
In the NPN bipolar transistor
103
, a collector
123
is formed in the second conduction type layer
109
, a base
122
is formed by using boron as impurities, and an emitter
121
is formed by using arsenic as impurities.
In the PNP bipolar transistor
104
, a collector
126
is formed by using boron as impurities, a base
125
is formed by using phosphorus as impurities, and an emitter
124
is formed by using boron as impurities.
In the P-channel MIS transistor
105
, a source/drain
128
is formed by using boron as P-type impurities. A gate insulating film
112
is formed with a silicon oxide film. A gate electrode
127
is formed on the gate insulating film
112
with polycrystalline silicon that includes phosphorus as N-type impurities.
In the N-channel MIS transistor
106
, a P-type impurity region
111
is formed by using boron as P-type impurities. A source/drain
130
is formed in the P-type impurity region
111
by using arsenic as N-type impurities. A gate insulating film
112
is formed with a silicon oxide film. A gate electrode
129
is formed on the gate insulating film
112
with polycrystalline silicon that includes phosphorus as N-type impurities.
Reference numeral
120
denotes an insulator isolation portion, which separates the N-channel MIS transistor
106
and the P-channel MIS transistor
105
by a silicon oxide film.
In this photoelectric conversion semiconductor device, current generated by light entering the photoelectric conversion portion
101
is taken out of the cathode electrode
116
, and then converted into a signal by a circuit that is formed as a combination of the NPN bipolar transistor
103
, the PNP bipolar transistor
104
, the N-channel MIS transistor
106
, the P-channel MIS transistor
105
, and the like.
In a data reading apparatus for an optical disk such as a compact disk, the market demand for high-speed reading of the optical disk has grown recently. A photoelectric conversion device that converts an optical signal into an electric signal is used in a read portion of the data reading apparatus. Therefore, the achievement of high-frequency property of the photoelectric conversion device is indispensable for meeting the market demand. In the conventional photoelectric conversion device in
FIG. 6
, P-type impurities contained in the semiconductor substrate
107
diffuse to the side of the intrinsic semiconductor layer
108
during the manufacturing process, and a portion in which the impurity profile changes gradually is formed at the contact portion between the semiconductor substrate
107
and the intrinsic semiconductor layer
108
. Therefore, in addition to the current that is generated due to carriers in a depletion layer when light enters, a current component is produced due to a diffusion of carriers generated in the portion of impurity profile gradient into the depletion layer after a delay. Consequently, time resolution is reduced.
To achieve a photoelectric conversion device with a good high frequency property, a measure for improving the response characteristics of the PIN diode has been employed, e.g., by adjusting the concentration of the first impurity in the semiconductor substrate
107
, the thickness of the intrinsic semiconductor layer
108
, and the thickness of the second impurity layer
109
, or a measure for reducing a wiring resistance component has been employed.
Though these measures are effective in improving the high frequency property of the PIN diode, they have an adverse effect on the characteristics of the bipolar transistors and MIS transistors in the control portion
102
. Examples of such an adverse effect include a degradation of the element isolation property, such as leakage current and a decrease of withstand voltage, at the PN junctions between the collector of the bipolar transistor and the semiconductor substrate
107
and between the source and drain of the MIS transistor and the semiconductor substrate
107
, an increase in parasitic capacitance, and the formation of a parasitic transistor. This leads to a decrease in the level of a converted electric signal by the photoelectric conversion portion, which in turn causes degradation of performance, such as processing accuracy and processing speed, for the signal processing portion and a reduction in yield.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device that can form bipolar transistors and MIS transistors for signal processing and adjust the characteristics of the transistors easily without being affected by the conditions of formation of a PIN diode for photoelectric conversion, such as the impurity concentration of a semiconductor substrate and the thickness of an intrinsic semiconductor layer, and a method for manufacturing the semiconductor device.
A semiconductor device of the present invention includes the following: a semiconductor substrate of a first conduction type; an intrinsic semiconductor layer of the first conduction type formed on the semiconductor substrate, the intrinsic semiconductor layer having a lower impurity concentration than that of the semiconductor substrate; a first semiconductor layer of a second conduction type formed on the intrinsic semiconductor layer; a first impurity layer of the first conduction type formed in the first semiconductor layer of the second conduction type; and a bipolar transistor and a MIS transistor formed in the first semiconductor layer of the second conduction type. The laminated structure of the semiconductor substrate, the intrinsic semiconductor layer, and the first semiconductor layer provides a diode for photoelectric conversion. A first insulator layer is formed in at least a portion below the bipolar transistor and a second insulator layer is formed in at least a portion below the MIS transistor.
According to this configuration, the insulator layers are formed respectively below the bipolar transistor and the MIS transistor, so that the transistors can be iso
Chato Tetsuo
Ohsawa Katuichi
Shimazaki Toyoyuki
Shimizu Yuzo
Malsawma Lex H.
Matsushita Electric - Industrial Co., Ltd.
Merchant & Gould P.C.
Smith Matthew
LandOfFree
Semiconductor device and method for manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3199482