Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2001-05-10
2003-12-16
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S738000, C257S780000, C257S779000, C257S784000, C257S723000
Reexamination Certificate
active
06664643
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a stacked package equipped with a plurality of semiconductor chips.
BACKGROUND TECHNOLOGY
In recent years, stacked packages in which semiconductor chips are stacked in layers have developed in order to promote miniaturization of semiconductor devices such as system LSIs. A stacked package has a structure shown in FIG.
3
.
Referring to
FIG. 3
, a plurality of electrode pads are formed on an interposer substrate
31
. A first semiconductor chip
32
is flip-chip mounted on the electrode pads. In other words, bumps
34
are provided at locations corresponding to the electrode pads on the surface of the first chip
32
, and the bumps
34
and the electrode pads are electrically connected to one another such that the first chip
32
is flip-chip mounted on the interposer substrate
31
.
A second semiconductor chip
33
that has a smaller measurement than that of the first chip
32
is mounted on the rear surface of the first chip
32
via an adhesive (not shown). The second chip
33
is wire-bonded to the interposer substrate
31
by wires
35
. The first chip
32
and the second chip
33
are molded by a sealing resin
36
.
On the opposite side of the chip-mounting side of the interposer substrate
31
, solder balls
37
that are connection members to be used for mounting on a printed wire board are provided. The stacked package and the printed wiring board are electrically connected by the solder balls
37
. In the structure shown in
FIG. 3
, the size of the second chip
33
is smaller than the size of the first chip
32
. However, depending on structures of system LSIs, the size of the second chip
33
may be greater than the size of the first chip
32
.
In such a case, when the second chip and the interposer substrate are wire-bonded, heating of the second chip becomes difficult, and an ultrasonic load may concentrate at areas where corner sections of the first chip contact the second chip, and excessive stresses may be generated at those sections. As a result, the second chip may be damaged.
The present invention has been made in view of the problems described above, and it is an object of the present invention to provide a semiconductor device and a method for manufacturing the same, in which, in a stacked package having semiconductor chips stacked in layers, wire-bonding can be conducted without damaging the semiconductor chips even when an upper semiconductor chip has a greater size.
DESCRIPTION OF THE INVENTION
In accordance with the present invention, a semiconductor device is characterized in comprising a first semiconductor chip mounted on a substrate,
a second semiconductor chip mounted on the first semiconductor chip, the second semiconductor chip being larger than the first semiconductor chip,
a base member that is disposed between the second semiconductor chip and the substrate, and
a connection member disposed below the substrate,
wherein the second semiconductor chip is supported by the base member.
According to the structure described above, the second semiconductor chip is supported by the base member. Therefore, when the second semiconductor chip and the substrates are wire-bonded, heat is sufficiently transferred to the second semiconductor chip through the base member, such that the heating of the second semiconductor chip is effectively conducted. Also, bonding pressure and ultrasonic energy that are applied to portions of the second semiconductor chip that extend outwardly from the first semiconductor chip can be alleviated. As a result, damage to the second semiconductor chip can be prevented.
In accordance with the present invention, a semiconductor device is characterized in comprising a first semiconductor chip mounted on a substrate,
a second semiconductor chip mounted on the first semiconductor chip, the second semiconductor chip being larger than the first semiconductor chip,
a filler layer that is provided between the second semiconductor chip and the substrate, and
a connection member disposed below the substrate,
wherein the second semiconductor chip is supported by the filler layer.
According to the structure described above, the second semiconductor chip is supported by the filler layer. Therefore, when the second semiconductor chip and the substrates are wire-bonded, heat is sufficiently transferred to the second semiconductor chip through the filler layer, such that the heating of the second semiconductor chip is effectively conducted. Also, bonding pressure and ultrasonic energy that are applied to portions of the second semiconductor chip that extend outwardly from the first semiconductor chip can be alleviated. As a result, damage to the second semiconductor chip can be prevented.
The present invention provides a method for manufacturing a semiconductor device, the method characterized in comprising the steps of mounting a first semiconductor chip on a substrate,
mounting a base member outside the first semiconductor chip on the substrate, and
mounting a second semiconductor chip that is larger than the first semiconductor chip on the first semiconductor chip, in a manner that the second semiconductor chip is supported by the base member.
According to the method described above, the second semiconductor chip is supported by the base member. Therefore, when the second semiconductor chip and the substrates are wire-bonded, heat is sufficiently transferred to the second semiconductor chip through the base member, such that the heating of the second semiconductor chip is effectively conducted. Also, bonding pressure and ultrasonic energy that are applied to portions of the second semiconductor chip that extend outwardly from the first semiconductor chip can be alleviated. As a result, damage to the second semiconductor chip can be prevented.
The present invention provides a method for manufacturing a semiconductor device, the method characterized in comprising the steps of mounting a first semiconductor chip on a substrate,
mounting a second semiconductor chip that is larger than the first semiconductor chip on the first semiconductor chip, and providing a filler layer in a manner to support the second semiconductor chip.
According to the method described above, the second semiconductor chip is supported by the filler layer. Therefore, when the second semiconductor chip and the substrates are wire-bonded, heat is sufficiently transferred to the second semiconductor chip through the filler layer, such that the heating of the second semiconductor chip is effectively conducted. Also, bonding pressure and ultrasonic energy that are applied to portions of the second semiconductor chip that extend outwardly from the first semiconductor chip can be alleviated. As a result, damage to the second semiconductor chip can be prevented.
REFERENCES:
patent: 6147401 (2000-11-01), Solberg
patent: 09-331599 (1997-12-01), None
patent: 10-005221 (1998-01-01), None
patent: 11-135537 (1999-05-01), None
Harness & Dickey & Pierce P.L.C.
Seiko Epson Corporation
Thai Luan
LandOfFree
Semiconductor device and method for manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3134296