Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1998-02-12
2000-11-28
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257345, 257398, 257399, 257401, H01L 2358, H01L 2976
Patent
active
061538922
ABSTRACT:
The present invention is a semiconductor device comprising an isolated N-type diffusion layer formed on part of a P-type semiconductor substrate or P-type well, a P-type channel barrier region formed so as to contact at least one part of the N-type diffusion layer, and an electrode drawn from the N-type diffusion layer through a contact hole; and constituting check elements to check the state of the P-type channel barrier region through measuring the junction withstand voltage of the N-type diffusion layer. With the aforementioned constitution, the state of the P-type channel barrier region can be checked with good sensitivity and without true breakdown of the thin oxide film having the same thickness as the gate oxide and influence from variations in the thickness of the field oxide, because the state of the P-type channel barrier region is checked by measuring the junction withstand voltage of the N-type diffusion layers. Also, even if the P-type channel barrier region is misplaced in relation to the N-type diffusion layer where the P-type channel barrier region is formed around the N-type diffusion layer, this does not influence the measured value of the junction withstand voltage.
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Loke Steven H.
Nadav Ori
NEC Corporation
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