Semiconductor device and method for fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S381000, C257S382000, C257S491000, C257SE29130

Reexamination Certificate

active

07919822

ABSTRACT:
A semiconductor device that suppresses variation and a drop in the breakdown voltage of transistors. In the semiconductor device in which a logic transistor and a high-breakdown-voltage transistor are formed on one Si substrate, an insulating film which has an opening region and which is thick around the opening region is formed on a low concentration drain region formed in the Si substrate on one side of a gate electrode of the high-breakdown-voltage transistor. The insulating film around the opening region has a two-layer structure including a gate insulating film and a sidewall insulating film. When ion implantation is performed on the low concentration drain region beneath the opening region to form a high concentration drain region, the insulating film around the opening region prevents impurities from passing through. This eliminates variation in the relative positions of the opening region and a place where the high concentration drain region is formed, and the high concentration drain region can be formed on a self align basis with respect to the low concentration drain region.

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Japan Patent Office: Japanese Office Action mailed Nov. 16, 2010 in corresponding JP Patent Application No. 2005-254729, with partial English-language translation.
Japan Patent Office: Japanese Office Action mailed Jun. 8, 2010, in corresponding JP Patent Application No. 2005-0254729, with partial English-language translation (previously submitted along with certified IDS filed on Sep. 8, 2010 but misidentified therein).

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