Semiconductor device and method for fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

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Details

257763, 257758, 257775, H01L 2934, H01L 2144

Patent

active

061304824

ABSTRACT:
The present invention relates to a metallization technique of a semiconductor device, more specifically to a semiconductor device having a wiring or plug of a suitable structure for high integration and a method for fabrication of the semiconductor device. The semiconductor device comprises a base substrate 10; an inter-layer insulation film 20 including a first insulation film 16 formed on the base substrate and a second insulation film 18 formed on the base substrate, and having a contact hole 22 which reaches the base substrate 10; and a conducting film 24 formed on an inside wall and a bottom of the contact hole 22, a width of the contact hole in the first insulation film 16 being larger than a width of the contact hole 22 in the second insulation film 18. The conducting film 24 on the inside wall of the contact hole 22, and the conducting film 24 on the bottom of the contact hole 22 is uninterrupted on a boundary.

REFERENCES:
patent: 4230523 (1980-10-01), Gajda
patent: 4561172 (1985-12-01), Slawinski et al.
patent: 4640738 (1987-02-01), Fredericks et al.
patent: 5117273 (1992-05-01), Stark et al.
patent: 5317193 (1994-05-01), Watanabe
patent: 5464794 (1995-11-01), Lur et al.

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