Semiconductor device and method for fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257321, H01L 29788

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active

061473790

ABSTRACT:
The nonvolatile semiconductor memory device of the invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first and second surface regions; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; and a control gate capacitively coupled to the floating gate via a second insulating film. The first surface region is an upper surface of an epitaxially grown layer formed on the second surface region. The drain region includes: a low-concentration impurity layer formed in the second surface region and having one end extending toward the step side region; and a high-concentration impurity layer connected to the low-concentration impurity layer and formed in a region distant from the channel region. An impurity concentration of the low-concentration impurity layer is lower than that of the high-concentration impurity layer. The floating gate covers the step side region and at least a part of the low-concentration impurity layer via the first insulating film.

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S. Mukherjee, et al., "A Single Transistor EEPROM Cell and its Implementation in a 512K CMOS EEPROM", IEEE IEDM 1985 Technical Digest, pp. 616-619, Dec. 1-4, 1985.
H. Kume, et al., "A Flash-Erase EEPROM Cell with a Asymmetric Source and Drain Structure", IEEE IEDM 1987 Technical Digest, pp. 560-563 Dec. 6-9, 1987.

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