Semiconductor device and method for fabricating the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C257S201000, C257S615000

Reexamination Certificate

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07037817

ABSTRACT:
A semiconductor device has a first semiconductor layer composed of a group III–V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III–V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

REFERENCES:
patent: 5830776 (1998-11-01), Kurogane et al.
patent: 6580101 (2003-06-01), Yoshida
patent: 6593193 (2003-07-01), Nishii et al.
patent: 2003/0020092 (2003-01-01), Parikh et al.
patent: 2003/0186488 (2003-10-01), Wen et al.
Masato et al.“Novel High Drain Breakdown Voltage AIGaN/GaN HFETs Using Selective Thermal Oxidation Process.” International Electron Devices Meeting, pp. 377-380, Dec. 10, 2000.
Inoue et al. “Novel Ga-N based MOS HFETs with Thermally Oxidized Gate Insulator.” International Electron Devices Meeting, pp. 577-580, Dec. 2, 2001.

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