Semiconductor device and method for fabricating the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Reexamination Certificate

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06693026

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and a method for fabricating the same that can extend an effective channel length without changing layout.
2. Background of the Related Art
Recently, with increase of packing density of a semiconductor device, the number of cells required in the same area increases and the size of a unit device decreases. As a result, a short channel effect is enhanced and roll-off of a threshold voltage increases, so that it is difficult to control device characteristic in mass production of the product.
A related art semiconductor device and a method for fabricating the same will be explained with reference of the accompanying drawings.
FIG. 1A
to
FIG. 1E
are sectional views illustrating fabricating process steps of a related art semiconductor device.
As shown in
FIG. 1E
, a related art semiconductor device includes a field oxide film
12
formed in a semiconductor substrate
11
, for defining a field region and an active region, a gate
19
formed by sequentially depositing a gate oxide film
14
, an amorphous silicon film
15
, a diffusion barrier film
16
, a metal film
17
and a mask film
18
on one region of the semiconductor substrate
11
, a channel region
13
formed in the semiconductor substrate
11
below the gate
19
, a lightly doped drain (LDD) region
20
formed in the semiconductor substrate at both sides of the gate
19
, insulating film sidewalls
21
formed at both sides of the gate
19
, and source and drain regions
22
and
23
formed in the semiconductor substrate
11
at both sides of the insulating film sidewalls
21
.
A related art method for fabricating the semiconductor device will now be described.
As shown in
FIG. 1A
, a field oxide film
12
is formed in a semiconductor substrate
11
by a shallow trench isolation (STI) process to define a field region and an active region.
A channel ion is injected into the semiconductor substrate
11
using a mask to partially expose the semiconductor substrate
11
corresponding to the active region. The channel region
13
is then formed in the exposed semiconductor substrate at a predetermined depth.
As shown in
FIG. 1B
, the gate oxide film
14
is formed on an entire surface of the semiconductor substrate
11
. The amorphous silicon film
15
, the diffusion barrier film
16
, the metal film
17
and the mask film
18
are sequentially deposited on the gate oxide film
14
.
As shown in
FIG. 1C
, the mask film
18
, the metal film
17
, the diffusion barrier film
16
, the amorphous silicon film
15
, and the gate oxide film
14
are selectively removed by photolithography and etching processes to remain on the channel region
13
and the semiconductor substrate
11
adjacent to the channel region
13
, so that the gate
19
is formed.
As shown in a portion ‘A’ of
FIG. 1C
, in the etching process, undercut occurs, in which both sides of the amorphous silicon film
15
are excessively etched. For this reason, an effective channel length of the lower parts decreases.
Also, the gate
19
having a multilayered structure consisting of the gate oxide film
14
, the amorphous silicon film
15
, the diffusion barrier film
16
, the metal film
17
, and the mask film
18
has high aspect ratio so that the semiconductor substrate
11
close to the gate
19
is shaded by the gate
19
.
As shown in
FIG. 1D
, lightly doped impurity ions are injected into the entire surface of the semiconductor substrate
11
using the gate
19
as a mask. Therefore, the LDD region
22
is formed in the semiconductor substrate
11
at both sides of the gate
19
at a predetermined depth.
At this time, the gate
19
and the LDD region
20
do not overlap each other as shown in a portion ‘B’ of FIG.
1
D. This is because that the ions are not injected into the semiconductor substrate
11
at both sides of the gate
19
shaded by the gate
19
having high aspect ratio.
As shown in
FIG. 1E
, a nitride film is deposited on the entire surface of the semiconductor substrate
11
including the gate
19
, and then etched back to remain at both sides of the gate
19
, so that the insulating film sidewalls
21
are formed.
Subsequently, heavily doped impurity ions are injected into the entire surface of the semiconductor substrate
11
using the gate
19
and the insulating film sidewalls
21
as masks so that the source and drain regions
22
and
23
are formed in the semiconductor substrate
11
at both sides of the insulating film sidewalls
21
at a predetermined depth. Thus, the related art semiconductor substrate is completed.
However, the related art semiconductor device and the method for fabricating the same have several problems.
Since undercut occurs in the amorphous silicon film during the patterning process of the gate, the effective channel length decreases. For this reason, short channel effect is enhanced, thereby degrading the characteristic of a semiconductor device.
Furthermore, the source region and the drain region are not overlapped each other as a dopant is not injected into the region shaded by the gate having high aspect ratio. As a result, the semiconductor device has a serious defect.
Finally, a defect like floating of a wordline occurs as the gate exposed to the air is oxidized, so that the characteristic of a semiconductor device is degraded.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a semiconductor device and a method for fabricating the same that substantially obviates one or more problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a semiconductor device and a method for fabricating the same that extends an effective channel length and prevents a gate from being oxidized, thereby improving reliability of the device and production yield and increasing packing density.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a semiconductor device includes a device barrier film formed in a semiconductor substrate, for defining an active region, a channel region formed in the semiconductor substrate at a variable depth and defined by removing some of the semiconductor substrate corresponding to the active region in a groove form, and a gate electrode formed on the semiconductor substrate with a gate insulating film interposed therebetween, a material of the gate electrode being covered with the gate insulating film.
In another aspect of the present invention, a manufacturing method of the semiconductor device includes the steps of forming a device barrier film in a semiconductor substrate which defines an active region, depositing a conductive film on an entire surface of the semiconductor substrate, forming a trench by removing a conductive film to partially expose the semiconductor substrate in the active region, defining a channel region by removing the exposed semiconductor substrate in a groove form, forming a gate insulating film on surface of the semiconductor substrate including the trench, burying the semiconductor film and the cap insulating film in the trench, removing the gate insulating film formed on the conductive film, removing the conductive film to form a gate consisting the gate insulating film, the semiconductor film and the cap insulating film.
It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and expl

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