Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1995-11-27
1998-03-10
Niebling, John
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438406, H01L 21302
Patent
active
057260893
ABSTRACT:
A method for fabricating a semiconductor device having a bonded wafer structure capable of reducing crystal defect in a power element forming region thereof is disclosed A recess is formed in a control circuit element forming region of a first n- silicon substrate, then filled with a silicon oxide film and subjected to grinding and polishing to provide a mirror-surface. An n- epitaxial layer is formed on the surface of a second n+ silicon substrate, then the surface of the epitaxial layer is coupled to the surfaces of the silicon oxide film and second circuit region of the first substrate and heat-treated to be bonded thereto.
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Mulpuri S.
NEC Corporation
Niebling John
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