Semiconductor device and method for controlling the same

Static information storage and retrieval – Read/write circuit – For complementary information

Reexamination Certificate

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C365S233100, C365S236000

Reexamination Certificate

active

07054204

ABSTRACT:
Disclosed herein are a semiconductor method and device which are capable of reducing data write errors by rewriting last write data during a write recovery time (tWR). The semiconductor device comprises a memory cell array consisting of a plurality of repetitive cell units; a bit line amplifier for amplifying a voltage difference between a bit line voltage and a complementary bit line voltage of the memory cell array; switching devices activated by a column selection line signal for electrically connecting a data line and a complementary data line to the bit line and the complementary bit line, respectively; and a write driver for supplying a write data voltage to the data line and the complementary data line, wherein the column selection line signal is generated during a write recovery time. The method for controlling the semiconductor device including a memory cell array having a plurality of repetitive cell units, a bit line amplifier for amplifying a voltage difference between a bit line voltage and a complementary bit line voltage of the memory cell array, switching devices activated by a column selection line signal for electrically connecting a data line and a complementary data line to the bit line and the complementary bit line, respectively, and a write driver for supplying a write data voltage to the data line and the complementary data line, comprises the steps of: writing data voltage into the memory cell array; and generating the column selection line signal during a write recovery time.

REFERENCES:
patent: 5844849 (1998-12-01), Furutani
patent: 6172918 (2001-01-01), Hidaka
patent: 6208580 (2001-03-01), Ozeki
patent: 6229744 (2001-05-01), Hsiao et al.
patent: 1998-071162 (1998-10-01), None

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