Semiconductor device, and method and apparatus for reducing a de

Details Semiconductor device, and method and apparatus for reducing a de Semiconductor device, and method and apparatus for reducing a de

1998-07-13

1999-07-27

Nguyen, Matthew

Electric power conversion systems

Current conversion

Including automatic or integral protection means

363 41, H02M 7122, H02M 112

Patent

active

059301325

ABSTRACT:
In a PWM inverter having a two-arm structure of upper and lower arms, the dead time is reduced to a minimum for improving the controlling accuracy and linearity under a very small rate of the inverter power output. Also, in the PWM control on a motor, the controlling stability at a lower speed can be increased. Particularly, an improvement for use in a PWM inverter comprises off-state detecting means, each connected to a power switching element in one of the two upper and lower arms of the PWM inverter for detecting the off-state of the switching element and gate means, each provided for receiving an off-state detection signal fed back from the off-state detecting means of the opposite arm connected to the input of corresponding one of the two switching elements and generating a turn-on signal for the other switching element.

REFERENCES:
patent: 5414341 (1995-05-01), Brown
patent: 5488258 (1996-01-01), Honda
patent: 5671131 (1997-09-01), Brown

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