Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2006-10-03
2008-10-21
Menz, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S250000, C438S424000
Reexamination Certificate
active
07439153
ABSTRACT:
A structure is adopted for a layout of an SRAM cell which provides a local wiring3abetween a gate2aand gate2band connects an active region1aand an active region1b. This eliminates the necessity for providing a contact between the gate2aand the gate2b. Therefore, it is possible to reduce the size of a memory cell region C in a short side direction. Furthermore, a structure whereby a left end of a gate2cis retreated from the gate2aand a local wiring3bwhich connects the active region1band gate2cdisposed in a diagonal direction is adopted. This allows the gate2ato be shifted toward the center of the memory cell region C.
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Igarashi Motoshige
Tsuboi Nobuo
McDermott Will & Emery LLP
Menz Laura M
Renesas Technology Corp.
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