Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
1998-10-23
2001-05-08
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S778000, C257S686000
Reexamination Certificate
active
06229215
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device which is referred to as a CSP (Chip Size Package), a BGA (Ball Grid Array) or the like and a method for manufacturing this semiconductor device.
A semiconductor device which is referred to as, for instance, a BGA is shown in reference to FIG.
9
and has, a semiconductor chip
101
mounted at a front surface of an internal substrate
100
(the upper surface in FIG.
9
), and the semiconductor chip
101
and the internal substrate
100
are electrically connected through wiring
102
in the prior art. Then, the semiconductor chip
101
is sealed with a resin
103
on the front surface of the internal substrate
100
. In addition, the semiconductor device assumes a structure achieved by providing solder bumps (solder balls)
104
at a rear surface of the internal substrate
100
(the lower surface in FIG.
9
).
In recent years, the need for achieving higher density mounting with this type of semiconductor device has become more pronounced. However, the semiconductor device in the prior art explained with reference to
FIG. 9
, which device fails to effectively utilize the area of the substrate over which mounting is possible when mounting at a motherboard, it is difficult to reduce the mounting area to a sufficient degree. Consequently, it is difficult to respond to the high density mounting requirement in a satisfactory manner.
Furthermore, since the reliability of the semiconductor device in the prior art, which is tested in a temperature cycling test conducted after soldering it at a motherboard is problematic, the reliability in the temperature cycling test is improved by filling the space between the semiconductor device and the motherboard with resin to hold down the electrically connected portions with the resin. However, there is a problem in that, in order to fill the space between the semiconductor device and the motherboard with resin, the number of steps to be implemented in the resin sealing process must be increased.
SUMMARY OF THE INVENTION
An object of the present invention, which has been completed by addressing the problems of the CSP or BGA semiconductor device in the prior art discussed above, is to provide a new and improved semiconductor device which achieves high density mounting by effectively utilizing the area of the substrate over which mounting is possible and a method for manufacturing this semiconductor device.
Another object of the present invention is to provide a new and improved semiconductor device with which high density mounting can be achieved without having to increase the thickness of the product and a method for manufacturing this semiconductor device.
Yet another object of the present invention is to provide a new and improved semiconductor device with which resin sealing can be implemented with ease and requiring only a small number of steps in a short time to realize a reduction in the production costs and a method for manufacturing this semiconductor device.
In order to achieve the objects described above, in a first aspect of the present invention, a semiconductor device with a first semiconductor chip mounted at a first surface of a substrate, e.g., a front surface thereof, and a plurality of bumps formed at a second surface of the substrate, e.g., a rear surface thereof, is modified in that a second semiconductor chip is mounted in an area with no bumps that is formed at a center of the rear surface of the substrate. Since the first semiconductor chip is mounted at the front surface of the substrate and the second semiconductor chip is mounted at the rear surface of the substrate in this structure, a mounting with a density twice as high over the same mounting area compared to the semiconductor device in the prior art becomes possible.
In addition, it is desirable that a through hole for passing sealing resin between the front surface and the rear surface of the substrate be provided at the substratein the semiconductor device, since this will make it possible to seal the space between the substrate front surface and the first semiconductor chip and the space between the substrate rear surface and the second semiconductor chip at the same time with the resin by supplying the resin either at the front surface or the rear surface of the substrate and passing the resin through the through hole provided at the substrate.
Furthermore, it is desirable that the electrical connection of the first semiconductor chip to the substrate front surface and/or the electrical connection of the second semiconductor chip to the substrate rear surface be achieved through a flip-chip connection, to achieve a reduction in the thickness of the entire semiconductor device.
Moreover, in a second aspect of the present invention, a method for manufacturing a semiconductor device is provided, which method includes a step for mounting a first semiconductor chip and a second semiconductor chip at a front surface and a rear surface of a substrate and a step for sealing with resin the space between the front surface of the substrate and the first semiconductor chip and the space between the rear surface of the substrate and the second semiconductor chip.
In this manufacturing method, it is desirable that the electrical connection of the first semiconductor chip to the front surface of the substrate and the electrical connection of the second semiconductor chip to the rear surface of the substrate be achieved through a flip-chip connection, to achieve a reduction in the thickness of the entire semiconductor device.
In addition, it is desirable that by supplying the resin either at the front surface or the rear surface of the substrate to pass the resin through a through hole provided at the substrate, the space between the substrate front surface and the first semiconductor chip and the space between the substrate rear surface and the second semiconductor chip be sealed with resin at the same time, since this will achieve a reduction in the length of manufacturing time and in the production costs. In this case, a side leak prevention jig should be employed to close off the area around the first semiconductor chip or the area around the second semiconductor chip at either the front surface or the rear surface of the substrate where the resin is not supplied, to prevent the resin from leaking through the space between the substrate front surface and the first semiconductor chip or through the space between the substrate rear surface and the second semiconductor chip. In addition, the side leak prevention jig may fulfill its function by blowing warm air in the area around the first semiconductor chip or the area around the second semiconductor chip to harden the resin.
Moreover, the step for sealing the space between the substrate rear surface and the second semiconductor chip with resin may be implemented after electrically connecting the semiconductor device onto the motherboard, so that the semiconductor device can be sealed with the resin and the space between the semiconductor device and the motherboard can be held down with resin at the same time to reduce the number of sealing steps.
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patent: 5477082 (1995-12-01), Buckley, III et al.
patent: 5798567 (1998-08-01), Kelly et al.
patent: 5808878 (1998-09-01), Saito et al.
patent: 5854507 (1998-12-01), Miremadi et al.
patent: 7-321248 (1995-12-01), None
patent: 8-139225 (1996-05-01), None
patent: 9-051015 (1997-02-01), None
Clark Sheila V.
Kunitz Norman N.
OKI Electric Industry Co., Ltd.
Venable
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