Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2005-11-22
2009-08-18
Pizarro, Marcos D. (Department: 2891)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S132000, C438S601000, C257SE21592
Reexamination Certificate
active
07576014
ABSTRACT:
A semiconductor device with a fuse3ato be cut for a circuit modification, of which passivation film coating the uppermost wiring layer is formed in a two-layer structure including a first insulating film11with high filling capability and a second insulating film12blocking penetration of moisture or impurities. An opening21formed in a specific depth through the insulating films on the fuse3ais coated by a third insulating film13with the blocking capability. This prevents the penetration of moisture or impurities, and the corrosion of the fuse3a.
REFERENCES:
patent: 4413272 (1983-11-01), Mochizuki et al.
patent: 5329152 (1994-07-01), Janai et al.
patent: 5444102 (1995-08-01), Nimitz et al.
patent: 5729041 (1998-03-01), Yoo et al.
patent: 6004834 (1999-12-01), Tsukude et al.
patent: 6124165 (2000-09-01), Lien
patent: 6168977 (2001-01-01), Konishi
patent: 6448113 (2002-09-01), Lee et al.
patent: 6507086 (2003-01-01), Lee et al.
patent: 6617664 (2003-09-01), Hayashi et al.
patent: 6656826 (2003-12-01), Ishimaru
patent: 6677226 (2004-01-01), Bowen et al.
patent: 6827868 (2004-12-01), Daubenspeck et al.
patent: 6875681 (2005-04-01), Bohr
patent: 6911386 (2005-06-01), Lee et al.
patent: 6914319 (2005-07-01), Okada
patent: 7323760 (2008-01-01), Sakoh
patent: 2003/0062592 (2003-04-01), Sato et al.
patent: 2004/0124546 (2004-07-01), Saran et al.
patent: 2004/0150070 (2004-08-01), Okada et al.
patent: 2004/0195648 (2004-10-01), Fujiki et al.
patent: 2004/0235220 (2004-11-01), Maeda
patent: 2005/0161766 (2005-07-01), Sato et al.
patent: 2005/0224908 (2005-10-01), Barth
patent: 2003-218110 (2003-07-01), None
patent: 2004-281918 (2004-10-01), None
patent: WO 99/34423 (1999-07-01), None
Japanese Notice of Reasons for Refusal, w/ English translation thereof, issued in Japanese Patent Application No. JP 2004-339424 dated Apr. 22, 2009.
Doi Hiroyuki
Miyake Takashi
Anya Igwe U.
McDermott Will & Emery LLP
Panasonic Corporation
Pizarro Marcos D.
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