Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257408, 257616, 257607, H01L 2978

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active

052452085

ABSTRACT:
A semiconductor device includes a first neutral impurity layer formed to a predetermined depth from a surface of a semiconductor substrate in a channel region that is interposed between source/drain regions and located below a gate electrode, and a second neutral impurity layer having a higher concentration than that of the first neutral impurity layer and formed to surround lower portions of the source/drain regions except for the channel region. Scattering of neutral impurities in the first neutral impurity layer suppresses generation of hot carriers, and the second neutral impurity layer suppresses diffusion of impurities in the source/drain regions in thermal processing. The second neutral impurity layer is formed by implanting neutral impurities obliquely after formation of the gate electrode.

REFERENCES:
patent: 4835112 (1989-05-01), Pfiester et al.
patent: 5134447 (1992-07-01), Ng et al.
"Design and Characteristics of the Lightly Doped Drain-Source (LDD) Insulated Gate Field-Effect Transistor", by Seiki Ogura, et al, IEEE Transactions on Electron Devices, vol. ED-27, No. 8, Aug. 1980, pp. 1359-1367.
"Submicron MLDD NMOSFETS for 5V Operation", by Masaaki Kinugawa et al, VLSI Symposium (1985), pp. 116-117.
"Optimum Design of Gate/N-Overlapped LDD Transistor", by M. Inuishi et al, VLSI Symposium (1989), pp. 33-34.
"Improved MOSFET Short-Channel Device Using Geranium Implantation", by James R. Pfiester et al, IEEE Electron Device Letters, vol. 9, No 7, Jul. 1988, pp. 343-346.
"Suppression of Hot-Carrier Degradation in Si MOSFET's by Germanium Doping", by Kwok K. Ng et al, IEEE Electron Device Letters, vol 11, No. 1, Jan. 1990, pp. 45-47.

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