Semiconductor device and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C257SE21614

Reexamination Certificate

active

11317796

ABSTRACT:
A semiconductor device and method of manufacturing the same are disclosed. An example semiconductor device includes a semiconductor substrate having a first well, a first source electrode, a drain electrode, and a first gate insulation layer formed on the semiconductor substrate, and a gate electrode formed on the first gate insulation layer. The example device also includes a second gate insulation layer formed on the gate electrode, a first source region formed on the semiconductor substrate between the first source electrode and the first gate insulation layer, a first drain region formed on the semiconductor substrate between the drain electrode and the first gate insulation layer, an insulating layer formed on the first source electrode, on the first source region, and on the first drain region, and a second source electrode formed on the insulating layer over the first source electrode. Additionally, a second source region is formed between the second source electrode and the second gate insulation layer, a second drain region formed between the drain electrode and the second gate insulation layer, and a second well formed on the second source region, on the second drain region, on the second source electrode, on the second gate insulation layer, and on the drain electrode.

REFERENCES:
patent: 4603468 (1986-08-01), Lam
patent: 4654121 (1987-03-01), Miller et al.
patent: 4656731 (1987-04-01), Lam et al.
patent: 4679299 (1987-07-01), Szluk et al.
patent: 4686758 (1987-08-01), Liu et al.
patent: 5083190 (1992-01-01), Pfiester
patent: 5625200 (1997-04-01), Lee et al.
patent: 5920088 (1999-07-01), Augusto
patent: 6413802 (2002-07-01), Hu et al.
patent: 6649935 (2003-11-01), Hsu et al.
patent: 6649980 (2003-11-01), Noguchi
patent: 2003/0178699 (2003-09-01), Nakazato et al.
patent: 2004/0065927 (2004-04-01), Bhattacharyya
patent: 2005/0189583 (2005-09-01), Kim et al.
patent: 2005/0194616 (2005-09-01), Yoon et al.
Goeloe, GT et al., “Vertical single-gate CMOS inverters on laser-processed multilayer substrates,” 1981, Electron Devices Meeting, 1981 International, vol. 27 pp. 554-556.
Zhang, Shengdog et al. “A Stacked CMOS Technology on SOI Substrate,” Sep. 2004, IEEE Electron Device Letters, vol. 25, No. 9 pp. 661-663.
Robinson, A.L. et al. “Fabrication of Fully Self-Aligned Joint-Gate CMOS structures,” Jun. 1985, IEEE Transactions on Electron Devices, vol. ED-32, No. 6, pp. 1140-1142.
Zingg, R.P. et al. “High-Quality Stacked CMOS Inverter,” Jan. 1990, IEEE Electron Device Letters, vol. 11, No. 1, pp. 9-11.

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